Hi I'm Joel from the Open Tech Lab and if you're seeing my face, it's because Dave has gone away and he's let me hijack a spot on his channel. Now if you're checking out my content for the first time, basically: I focus on the lowest cost and most powerful tools that I can talk about to get into engineers hands. So I'm really interested in some of the devices that are produced out of China Some of them are ugly, some of them are bad, but some of them are quite good. and they're usually quite powerful within certain limits.

And so this is something to me that's well worth exploring. and they're always available at a really, really affordable cost, which to me is really awesome because it lowers the barrier to entry. Now, the other focus of this channel is on Open Source, and the reason for that is that to me, Open Source, the world of Open Source is like a massive cavern of technological wonders, a massive workshop of tools waiting for people to pick up and use them. So I focus heavily on Linux Everything in my videos is always done with Open Source, and even the production of the videos themselves is done with Open Source.

Now, if you're interested in finding out more, check out my little channel. and if you like it, subscribe but without further ado, let's get going with the main video. Hi and welcome to the Open Tech Lab! So I've got some boards in the mail to share with you today said to me by Edmund human Berger all the way from Austria and he sent me a couple of boards and the main one is this Iko board which is an FPGA board featuring the lattice Icefall T FPGA and it works as a hat for the Raspberry Pi and it's designed to help people get into Fpga development using open-source software. Now I've spoken about the Icefall T previously, but just as a recap for the ones that don't know, let me explain exactly what is an FPGA.

It's basically a type of programmable Hardware inside a chip. So the structure of the chip is a series of tiles of programmable logic gates connected together with wires and switches. So that the result of this is that you can program this chip to become any kind of digital circuit just by programming the switches and gates with the hardware that design that you want. So it kind of turns any kind of hardware problem into a software problem if you will.

Now the general context of this is that we're living in exciting times when it comes to FPGAs and open Source because just a couple of years ago it was not possible to program any FPGA with open source software and thanks to the hard work of Clifford Wolff and several other talented developers, it became possible to program these chips with the Ice Storm tool chain. and since that time there have been moved moves towards getting other open source tool chains working for other FPGAs on the market. So in this video we're going to have a little mess around with the Ico board, see what it can do and we'll have a little look at the status of the Open Source FPGA ecosystem. So let's have a little look at what we have on this board.

So of course at the heart of it we have the Lattice Ice 40, HX 8 K. This is the high speed variant of the FPGA and it is the very largest of the whole family. This has eight thousands look-up tables hence the name 8k and these are arranged in a 32 by 32 tile grid and each tile contains eight logic elements. Now the FPGA is hooked up to various connectors that you can use if you want to attach things to the board.

We have four of these 51 pin flat flex connectors and you can plug in a flat flex ribbon cable and take it off to whatever you want. And also we have this grid of point one inch holes here that are connected to the same lines as these two connectors on the right and you can solder things onto the board that way. And also we have four of these double row P mod connectors and P mod is a something of a standard for FPGA extension mod modules and I'll talk a bit more about those in just a minute. And then on the Left we have two LEDs, one two, and two little switches as well, which can be useful to give some input and output to your hardware design in the FPGA.

So within this board, there is the option to either load the firmware from the Raspberry Pi or to have it stored within the board itself. So for this case, we have this SPI flash chip and when the board is configured to load from internal memory, the FPGA will automatically download the firmware out of this flash chip. When it powers on, we flip the board over to the other side. you can see there's a couple of things here.

We have this 8 megabit SRAM Now this is an option on the more expensive version of the board and it can be used to store that 1 megabyte of data and it can be useful for the FPGA to give it somewhere to store any intermediate data that it happens to be processing through. and then over here we have another a second little FPGA. This is a lattice Mac XO 2 and its role is to control the connectivity between the Ice 40 underneath here and the Raspberry Pi and the SPI flash. So it basically works as a switch depending on whether you want the Ice 40 to load its firmware from the flash trip on the other side or whether you want it to get its firmware from the Raspberry Pi.

Now, the Ico board is compatible with most versions of the Raspberry Pi out there, certainly all of the newer generation boards. The only boards that it's not compatible with is the very early Raspberry Pi original version model B and the issue is that this board only has the reduced length pin header here with the fewer pins, whereas the Ico board requires the full length expansion header that you find on this Raspberry Pi model 3b that I have here. and so we can take this board and just slot this on here. And of course, this would also be possible with the Raspberry Pi twos and the Raspberry Pi zeroes.

Now as an alternative to the Raspberry Pi I've been sent this board which is the Aiko US base board and this is designed for cases where we want to use the Aiko board, but without involving a Raspberry Pi. So in this case, the right the Aiko board would slot onto the pin header and then we'd plug this board into the PC through this USB connector. Now, the idea behind this is that it can be useful when you're developing your firmware. It's quite computationally expensive to compile the the hardware designs into the bit stream for the FPGA and can take the Raspberry Pi quite a lot of time to compile that.

It's perfectly supported and quite a useful thing to be able to do, but you might find that it's a bit quicker to do the firmware development on your PC rather than doing in the Raspberry Pi. And of course, you could do the development in your PC and then use a network transfer to get the firmware once it's compiled onto the Raspberry Pi and then use that to load the firmware into the I/o board. But some of the time it may be just easier to connect the Ico board directly into your PC and cut the Raspberry Pi out of the set up altogether. So that's one use case for this, but the second one I.

Find much more interesting because at the heart of this board, we have the FTDI ft 20 to 32 H which is a versatile USB controller chip slave controller and it has two ports to it. Now, one of the ports on this thing is going to be plugged up to the FF PGA's programming ports so we can load the firmware using one of the ports that the FTDI chip, but the other port is available for general use in your project. and the FT 20 to 32 H allows high speed USB transfers, which means we've got a really, really nice way of transferring data at quite some speed. Hundreds of megabits between the I/o board and the PC and I can see that coming in.

Extremely useful now. I'm slightly confused about the purpose of these pin holes along here. I'm not really sure what they're meant to do. They seem to be sitting on the bus connection between FTDI chip and the pin header for the Ico board and there are all these zero ohm links, which means that you can break the connection between the FTDI chip and the pin header.

so I suppose the holes might be useful if you want to inject your own signals onto the header here for whatever reason. now. I Guess this must be a first-generation builded the ICO US base board and you can tell there's because there's a couple of mod wires on here and I suppose they'll get that fixed up in the design if they do a second manufacturing run of this board. But overall, don't be fooled by the mod wires because actually I am very very impressed by the build quality of these.

PCBs Whoever built these PCBs did a really, really good job. They're beautifully laid out and the PCB manufacturing quality is really, really good. The silkscreen is razor-sharp the tracks are just beautifully sharp on the board, gold finish on all the pads, and also there's even a bit of a gold trim along the edge of the PCB just to make it look a little bit more bling. It looks really nice.

This is a great quality board. Now switching back to the Raspberry Pi Let's see if we can use it to load some firmware onto the ICO board. So here's my setup: I've got the Raspberry Pi running a stock image of Raspbian and I've attached a monitor and a keyboard and mouse. So I can control it and I've got it plugged into the network and I've got the ICO board plugged in on the top and as you can see in the default state, the ICO board already has some test firmware loaded into it.

The firmware is blinking the two LEDs on and off. So now we want to go ahead and build our own hardware design to run on the FPGA And to do that, we're going to need to get a copy of the Ice Storm tool chain, which is the series of tools that are required to take our Hardware design code and compile it into a bit stream that can be loaded onto the FPGA. Now to help get started with installing the software onto the Raspberry Pi, there is this helpful getting started guide on the ICO board website which lists just four steps that are necessary to go ahead and do that and the first step in. this is a link to a Raspbian Jesse image that you can download and this image has the Ice Dome tool chain pre-installed into it.

so all you have to do is download the Sim and flash it onto an SD card and then run it up on the F on the Raspberry Pi. But my critique of this is that it's quite a job for them to keep up to date with the Upstream Raspbian project with their images and already this one is a few months old and in my opinion it will be a bit better to start with the stock Raspbian image and then install the Icestorm Toolchain tools into that I Think that's a little bit better? It's better to start with something up-to-date and it's more helpful to know how the software is installed. And it's not a complicated process to it install the software, it just takes a little time for the Raspberry Pi to compile it all. So if you're looking for a quick start, you can just download this image.

But to demonstrate how to install the Ice Storm toolchain, I'll just show how to compile the tools. So our first port of call for installing the tools we need is on the Project Icestorm page on Clifford Wolf's websites, and if we scroll down to about halfway through the page, there is this section here: where are the tools, how to install, and the first thing we need to do is install the various prerequisites. And so we're gonna use the section from Ubuntu here, the prerequisites on Ubuntu and the same as on Debbi and end on Raspbian. So this is what we need and then we're going to go ahead and build the Ice Storm tools.

then Arachne PNR then Yosa sand these three tools together form the Ice Storm tool chain and I found that building these tools on the Raspberry Pi took about 90 minutes to complete. It's rather a slow process on The Raspberry Pi compared to a desktop, but 90 minutes is not too bad. Of course, it would be possible to cross build the tools on a PC and copy them over to the Raspberry Pi, but that's a lot more complicated to set up, so in this case it's just quicker to build it on the Raspberry Pi itself. Next up, we need to get ahold of ICO Prog, which is the tool that we're going to use to load the firmware into the ICO board into the FPGA and the source code for this is contained within this Github repository.

and I'll link this repository and all the other things in the show notes if you want to follow it up. and if you scroll down, you can see there's a readme file and this gives us all the information we need on how to install this into the Raspberry Pi. The only thing to be aware of is that it has this section on installing wiring Pie, which is a prerequisite of Ico Prague. and if you're using Raspbian as I Am, you can skip this step because Wiring Pi is already as installed by default.

and then if we go down to the section on installing ICO prog, the instructions are really straightforward. just grab the source code from Git and use a make file to build the source code, and that's about all there is to it. Now, one thing that's immediately noticeable is just how compact the installation is compared to typical proprietary vendor tools which usually take up gigabytes of disk space. Whereas as you can see, the installation I've just done here is taking up a mere 274 megabytes and a lot of this is taken up by the databases for the Ice 40 FPGAs But also I found that much of this is being taken up by the size of the Yosa sects acute about and as you can see if we do an LS on it, it's taking up 159 megabytes of disk space.

And the reason for this is that by default it's being installed without being stripped. Which is to say that debug symbols are bundled into the executable and they don't need to be there and they can be stripped out. And it turns out that if we do that, what we are left with is just 6.9 megabytes of it executable data, which is absolutely tiny. And of course it would reduce the overall volume of the installation quite a bit.

So the installation is pretty compact now and it could be even better. So now we're about ready to start building a simple example. and for this test I Just want to build something simple that will flash the three LEDs on and off. Now this is a nice standard thing to do with any new chip.

Flash a few LEDs And for anyone who's new to FPGA programming, this is going to be a super simple example, but it should give you a bit of an idea of the sorts of things some FPGA can do. Now, in order to achieve this, we're going to be using the hundred Megahertz Crystal oscillator input, which is the main oscillator on the Ico board and we need to divide this frequency down to the point where it will be visible as a square wave of low enough frequency that we can actually see it properly as a flashing flashing light. And so what we're going to do is we're going to use a binary counter and a binary counter of course counts up in binary, but of also it ends up producing a series of square waves where each bit ends up being half the frequency of the one above it. so the zeroth bit will flash it 50 megahertz, the first one at 25 second, it twelve and a half, and so on, and so on and so on down until we get six Hertz, three, Hertz, and one and a half which will be a nice speed to have the LEDs flashing at.

So let's go ahead and start writing some very log. So I've created an empty directory. so now we can go ahead and pop up a text editor and start writing our code. So this file is called top Dot V and it's called that because it's going to contain our top module which will encapsulate the whole FPGA design and I'm going to define some inputs.

It'll take a clock input and I will define the LED outputs and I'm gonna define these as a three bit word so that we can treat these three LEDs as a group and I'm gonna close out the module like this. and now let's define the content. So I'm going to find a 26 bit register going from bit numbers 25 down to zero and I'm gonna call it counter and then I'm going to assign the top three bits of that register to the LED wires. So let's do that's and I'm going to assign bits 23 up to 25 to those LED pins and now we're almost.

We just need to make the counter counter with the clock edge. So I'm going to create an always block here and I'm going to say always when the positive edge of the clock occurs, then we will increment the counter by by 1-1 count. Now, with these always blocks, if you have more complexity involved, you typically wrap it around with a beginning and end, but in this case because we've only got one line, it's a place inside the always block. We can just do it as a nice one-liner just like that.

Next up, we need to define our pin assignments. so I'm going to create a file called Demo Dot PCF which will contain the and strengths of our design and I'm going to set up the various iOS the clock signal comes from pin are nine on the device, the LEDs come from three different pins so we have to assign LED one to C8, we have to assign Led two to F7, and we have to define LED three as being attached to pin K9 and all of this information is listed on both the Ico Board website and on the schematic. Now that is all we need for our source code and our design is complete Now to save time. I've gone ahead and pre created the make file that we're going to need to build a bit stream from our source code so let's go ahead and run that now.

the build process is not ever so quick on the Raspberry Pi It has not ever so much computing power but also our design is extremely simple so it just takes a couple of seconds to complete and we just have to wait a moment and there we are we have the results of the build. We've got a few files but the most significant among them is the file Demo dot Bin which is the bit stream that we need to load onto the FPGA. Okay so now we're going to watch the board as we load in our design and as you can see the default design has these two flashing green LEDs as I mentioned and the reason for that is that there is a firmware pre programmed into this flash chip and the FPGA When it starts up, the first thing it does is read this flash chip to load the design into itself. So when we reconfigure the design with this design that we've just synthesized, we're not going to reprogram the contents the flash chip, we're just going to update the contents that's running live in the FPGA And to do that, we're going to run the ICO prog tool with the dash P option and we're going to type in our synthesized binary data and let's run it.

And there we have it. The three LEDs are flashing just as we designed them to. So all the code we wrote has now come to life now to help make the design that we've implemented a bit clearer to understand. There is this extremely useful Ice 40 Layout viewer tool written by Christian Nielsen and this is a web based layout viewer that allows us to load any ASC file.

We can upload this file which is a product of the synthesis process and it will visualize that file on this canvas. Now what we're seeing here is a representation of the structure of the FPGA where every single one of these squares represents one of the tiles within. the FPGA and the purple tiles are the normal logic and flip-flop tiles. The yellow tiles are Ram tiles and the turquoise tiles around the outside are IO tiles.

Each of these contains a physical connection to to physical pads on The device. Now if we were to want to see every single wire inside the device, we could check this draw all spans box. but this would slow my browser to a crawl because it takes an extremely large amount of drawing effort to try and draw every single wire because there are thousands of them. So for the most part we're gonna leave that unchecked and just visualize the parts of the design that are actually in use right now.

and if we have a look here, you can see that there are 4 IO tiles in use. Each of these has half of the pin, half the pads that are connected to these, one pad each actually in use and if we hover over this one we can see this is the clock 100 megahertz net and this is drawn a bit strangely because this pad is connected directly through to the Global Clock Routing net which is a big net that connects off to every tile inside the FPGA and then these other three wires 1, 2, & 3 are the 3 wires that go out to the LEDs to their respective pads and each of these connects into this structure that's been implemented in the middle here. and if we zoom in on this part of the design, we can see the 26 bit counter has been implemented using these 6 logic blocks and you can see in the middle we have something quite conventional looking. It looks wrong like we'd expect a counter to look like.

the lower two bits are a bit weirdly implemented and I will leave it as an exercise to the viewer to figure out why it's been implemented this way or how it works. But for the most part, what we've actually got here is pretty straightforward and exactly represents our design Well, that concludes the first part of this video and as you can see, we're only just getting started. So check out the second part of this video and I've got some really cool demos to show the sorts of things that's possible with this board. You.