Hi look what? I Found the other day when I was going through a whole bunch of old stuff here in the lab. came across some old design notes for an old project I did way back in yes, check out the date 1995 so that's practically 20 years ago now and I still got the original design notes for a Pc-based logic analyzer project I did in electronics Australian magazine in October 1996. So I thought it would just be nice to actually take a look at some of these old art diagrams and see how we did things back in the old day. and maybe I can show you the project.

I've got the original prototype here, have a look through the magazine and then maybe see if we can find some of the old design files and see if we can get them back up and running. Should be interesting Now you have to excuse my voice, it is not the best today. So half I'm doing as good as I can now. this is the the first one I found.

it's an old timing diagram hand-drawn timing diagram I did of the control circuitry for this logic analyzer as we'll see in a minute and well, this is what you did back in the day before. You know simulators are writing VHDL or Verilog code and then running simulators on that and stuff like that. This is how you did digital logic design the day. you would hand draw timing diagrams on this five millimeter graph paper like this was very handy to do these sorts of things onto line stuff up and things like that.

So pretty much just designed this on paper and in my head you know, gray matter simulator, paper simulator, whatever you want to call it. Dave CAD simulators and earlier Dave CAD stuff from 20 years ago. Geez Anyway, this is a hobby project I got published it yeah I can't remember details of this but yeah, these are my original timing diagram notes and look, you know that PC back signal whatever piece acknowledge signal I guess because this was PC controlled must stay low during right and then read-back and then writing period and waiting for trigger and hold hold hold hold and then read back in their right mode here and then I've got I don't know what I've got a question mark for there but I obviously had to do something tricky at that point and must allow trigger here and all this sort of jazz. so this is just a neat way to do digital logic design and was very common and hey, I would probably still do some stuff like this and today I wouldn't simulate everything I'd still do some things like this on paper and then in addition to the timing diagrams.

I've got a control circuit concept here, which um, it was probably my it may have been my first draft I can't actually remember of the control circuitry how I was going to control this PC base logic analyzer. and here's the input here. it's a PC parallel port interface. Now this USB rubbish or serial parallel port was.

You know that one of the major means of controlling projects at the time and I did quite a lot of projects using the PC parallel port, including a digital storage scope IC tester, EEPROM programmer and this logic analyzer and some other stuff as well. So I've got like a 245 here. I've got an 8-bit latch because you have to latch data in, but I think I went away from this. We might see this in a minute.

Anyway, we've got some at six, two to five, six hundred and fifty nanosecond SRAM which would be used to store the data in 16-bit binary counter to increment the address. We've got some a MUX here. ds0 I'm not exactly sure what I'm doing there at the moment, have to read the article again and then just some control lucky nut flip-flops I trigger sort of stuff the arm signal. We've got another sixteen bit counter here.

This would have been the post triggered counter because in a logic analyzer, you want 50% pre and post start triggering so they can see information before and after the data event. And yeah, and that I guess turned into because these are at a these are at a later date. In fact, this one is 19 1996 so this is at February 96. This is significantly after this one, so I might have like a redraw and this one this might have been like a new revision of it or something like that, but I've got two different chips here as we'll see in the hardware design I've got my main logic analyzer, my main control chip which had all the control circuitry that we saw here basically embedded this looks like it was not like my final implementation, and I've got the logic analyzer trigger chip here as well because we needed fully mass cable triggering ie.

you had to set in software whether or not you're one to trigger on a high low or don't care condition or something like that. So and here you can see that I've got got to repeat all this circuitry and this was a 32 channel logic analyzers because this looks like an 8 input architecture here. so I would have duplicated that 4 times in my main R/c peeled. Egypt So I designed this entire project on paper like this and I would have had like little crap scrap notes and things like that.

It would have had another notebook where I recorded test results and did you know some other stuff and things like that, but these are basically all over got available in my archive. I'm surprised I still have them actually. but now we can go take a look at the final article. Brilliant! So my final design an article was published over at two issues: first party in October 1996 and second party November 1996 and I was I was a bit disappointed that I didn't get like a front cover shot.

The you know, one of the goals back then was to get our front cover photo of your project or something like that I didn't I just got a tiny little 32 channel 40 megahertz logic analyzer thing here and as you can a bit I did get a photo in here though. So yeah, that was alright. I was pretty chuffed though. Now one interesting bit of history.

look at this: the Tektronix Tds 220. This is almost twenty years old. This scope. look here it is.

Who can remember that? Jeez, it was. yeah, you know this was an massively groundbreaking scope and this was one of the well. this was one of the first reviews. They got an advance start unit and 20.

Can you believe at 20 years old this was a complete game changer! This is where you know the first. Really affordable real time ie. you know the sample rate. One gig sample was second was like 10 times faster than the analog bandwidth of a hundred megahertz and operated.

You know, the controls and everything operated pretty much like a real analog scope. And yeah, it's a crap scope by modern standards, but people still pay a huge premium for these. They just I don't know people have an affinity for them, but anyway. um yeah, The horrible by modern standards.

Slow. The screen is terrible. limited are two and a half case sample memory which is really pathetic. But back then man, this was the Ducks Guts scope and that's what started.

for all you youngsters out there who buy their rogue oldies you know 1054 Zed and everything these days and take it for granted. This was the thing that basically started the whole portable digital scope thing. and there you go. It's almost twenty years old.

There's the original review Wow and sorry about the little non sequitur here I Can't help myself I Just love history I'm article by Jim G'day Jim If you're watching, he still writes for Silicon Chip Magazine Anyway, he basically nailed the end of the article 20 years ago. If anything, can we low in scope buyers away from the Asian analog clones? These new tech models surely have a good chance of doing that. And in any case, they surely represent a very significant milestone in Scope technology. And it wouldn't be surprised if they change our expectations of scope packaging and price performance factor forever.

Jim Absolutely nailed it. Back then he knew these things were, you know, game-changing and he was bang on. And here's the original full-page ad for the Scope. Here we go: 1,400 Australian dollars by the way, for the tedious 210, 60 megahertz or 2 grand for the hundred megahertz model from Omona.

They're still the dealers and they're of course the Australian reps for I Go scopes these days. they're the ones that have basically taken over from these venerable tedious to 20s and John South was probably still working at a moaner back then I think good a John And here's the original article. Part one was really tough when it came out. Of course with all my projects was the reason that I did it Fantastic.

Ah I actually um, shared it with my mate Dave bull phony at the time. good a Dave if you watching he. He didn't really have too much to do with this project, but we kind of sort of worked on a few you know, concepts and things together. so I thought I'd just add his name to the article here and he I didn't tell him I was going to do that and he was that pretty chuffed as well that I added his name to it.

Anyway, yeah, got a photo shot. Got my original schematic that I did in Protel ah 1.61 for dos I would have done all these things in and all the drawings as well as you'll see in a minute. um, specifications for this puppy it was TTL CMOS are compatible 32 channels up to 40 megahertz sample rate which was pretty good. only 20 megahertz in state analysis mode though 40 megahertz in timing analysis mode.

And then let's trigger word masks external triggering as well fully mask about 32 channels. optional glitch capture I actually don't remember about that address. started disassembly in software and external buffering and triggering boxes which I did external probes and I think I made some buffer boxes but yeah I never sold those and they published up my schematics exactly as is as I said I would have I believe I did this in that Protel for Dos 1.61 the no dongle Edition back when they had dongles and these block diagram drawings I did those in that schematic as well I did a lot of stuff in schematic proto schematic. back then I did the front panel as well which we'll see in the next thing.

I did you know I basically used it as a very simple work CAD tool. It just worked. So anyway, we've got our main schematic here. We've got the main circuitry for our Trol Lsi chip which came from this one we saw before and then we have our trigger control circuitry here.

It looks much better than my original concept down in here, so you can see that I actually rather like this one over split it up into what separate sections, mask and invert shift registers. So basically I feed in serial data like this from the PC it goes into these registers so I can actually set the individual bits on the Masquerade and the invert our comparator array here. So if you want to like mask out a bit ie. not trigger on that bit, you can set an individual output here.

and that was just an easy way to do this. So it's a little bit confusing. but here's basically the data input to the chip and the data input goes directly over to the invert comparator array here before it goes on to the mask it and then the grouping arraigns and grouping array and then the quality output ie. trigger output and these data output MUX is here.

This is a 16 channel chip, by the way, as you'll see in the hardware in a minute. I've got two different trigger chips in here and this was a sneaky bit of dual-use here inside the trigger chip. the trigger chip I don't need these maxes for the triggering of course I could have just had the data coming straight into here and then you know, giving my eventual trigger output. but I added these data output MUX is in here to sort of make use of what some space I had left in the CP or D LSI chip and this, of course I had to read the data back out to the PC.

So of course I've got like 32 channels. so I've got 32 bit memory in this side and inside this thing. how do I read it out? Well to separate 8-bit muxes here allowed me just to read the data back out from the memory bus, which this was ultimately hooked up to. So just a, you know, a bit of it wasn't just the trigger chip, it also did some data out read back for the PC as well.

So if you're wondering just how this worked, well, we've got our inputs over here. from the front panel. we've got our latches here and these go through to the trigger chip. here.

the data buses are taken off so two separate trigger chips handling not sixteen channels each didn't have the internal space to do it all in 32. I Don't think although I probably know I probably could have got a larger chip but I think physically it was better to do it with two separate chips or something like that anyway and a separate control chip. This one used the latter some LSI 10:16 as we'll see shortly and use this use the actually the 10 16 is well on this schematic because Sworn I changed that to the 1032. anyway.

So if you're wondering just how this thing works well, this invert our comparator ray that basically can invert each individual bit. So here's our data input coming in here and there's an input into Each of these are exclusive nor gates here and depending on whether you put a 1 or a 0 there, you can either feed the signal straight through or you can invert it. That's the benefit of the exclusive nor gate. So if you set a 1 here then on on here then it would invert your bit.

Why would you want to invert it? Well, because that's for the positive or negative triggering. You could set each channel for positive or negative. Because you had to do that. You had to invert them so that you could then eventually get all in one hit.

get your our trigger output here. Then we had what's called a Masquerade here and that once again, you'd get the individual bits here. You could program each year input each year data inputs to either pass through or not. So if you put a 1 if you programmed a 1 onto this input here, then of course this is an Or gate.

so it'll always be one out here. It'll always force a 1 So it doesn't matter what your input data does, you effectively mask out that bit from your triggering operation. So with those two steps there, your inverting and your mask in, then you just start group them all together. This is just one big end gate basically.

and then you add them all together and bingo you get a trigger output. And as for this control chip here, Well, I don't remember exactly all the details. You can actually read the article which we'll link in down below. I've actually scanned in the PDF of both of these, so you'll be able to read the whole thing if you like.

I think I described its operation in detail and it go through and read it all again. Anyway, the semantics aren't hugely important, but this is basically all the control circuitry that I did all these timing diagrams for. So all these yeah, look, aren't There's the arm signal. For example, there we go.

That's the arm signal. Is there a trig signal coming in there? Trig Select I've obviously are changed to fewer the name since I did this original timing diagram, but this should be, you know, fairly close to the final operation of the things then. As for the trigger section here, basically we've got two different trigger inputs because I've got two triggered ships. so I just end those yet again.

So I'm expanding that huge end gateway. Yeah, so before we've got an external triggering, this is just a MUX We can choose whether or not we want internal or external triggering and then our triggering polarity is done in here, not actually in the trigger chips. Now let's trigger delay section here. It's a bit of a deceptive title because it doesn't actually delay the trigger as such.

What it does is it gives you a selectable time window that the trigger period has to stay open for, so you can have like, you know, just a single trigger pulse or you might need arch to. It Might have to stay high for two clock periods or something like that, or four, six, eight, or whatever. So basically you can select these here and that just allows you to stop any spurious trigger signals from causing any issues. and then that feeds up here and then sets and Rs flip-flop here which basically takes it from the regular armed mode.

So when it's regularly running this Ram counter is always fill in. So it's always sampling data when it's just sitting there waiting for a trigger going through all the Etsy As it says it's a circular address counter so it's just counting through all of the 32k memory I think it had so it's just going all the way through that and then when the trigger signal comes through here like this and makes it through the delayed part of it it we use this flip-flop sets it in the other direction and then what happens is this a post trigger counter here starts which is a divided by thirty two thousand, Seven, sixty eight and then that will. Basically when that's finished counting it will do end of sample so it will say stop sampling and then what you end up with in your memory is half of your memory sample memory filled with your pre trigger data and the other half your memory filled with your post trigger data. So it's actually reasonably involved How all that works and you've gotta go through and figure out all these you know timing diagrams.

Basically I did like all this in my head basically how it would work and the timing diagrams were just there to sort of you know, prove it and just give me like a visual representation of you know to see if there were any any issues or something like that before. I Build up my first prototype and here's part two of the article in the following month. That was actually quite common. If the article went over like you know, five or six pages or something like that, they typically split it and then you slid it into like the first month would be theory and the schematics and how it works and everything.

and then the second part is just like a construction. You know we've got probe construction and things like that. how to construct the thing that's internal shot I can show you that the real hardware for that in a minute. We've got the overlay diagram here which I'll talk about and just some probes I did with like an IC er test clip and I didn't have any photos of my pods at the time.

my buffer pods and things like that. and of course they would publish the front panel in actual size. They'd publish the PCB diagram in actual size because people would photocopy these and then you know, photo expose Oh photocopy them one-to-one size photo, expose them, and then etch their own boards I edge to my own board for this one and as I said, this was actually done in Proto Schematic software. Got a nice little parts list here which I would have given them and they just sort of like reformatted that.

but apart from that, I just donated in text format. it would have just been plain text. Now, this logic analyzer design could have been a lot more complex I could have designed, you know, like a higher-end one. better performance, better interface, all sorts of stuff.

but I wanted I set some very specific goals for this as was common in magazine articles back in the day, so that people could actually build this themselves. And one of the things of course was to put it all one single sided PCB and that was A. That was a big goal I had, which why. which is why for a 32 channel logic analyzer to fit it onto a single sided PCB meant that I was forced to go and use these.

Um Lattice is Pls I chips which we'll take a look at and I did. I got it onto a single sided board I was very proud of that. Had a few jumper links of course. had to jump the odd bus here and there, but yeah, it generally wasn't It wasn't too bad.

You know there's performance penalty to pay for single sided board in terms of signal integrity and stuff like that, but it was just a goal. I said it was just a fun goal I set myself. it was just a fun project and you know, and that's what I did. basically and I used the parallel port because, well, you know I was familiar with the parallel port and everyone had a parallel port at the time and things like that.

So I used um off-the-shelf available SRAM's these were common as that cache memory chips back in PC that pcs back in the day when you actually had to plug your own 6 to 256 SRAM chips beside in into sockets beside your processor to actually do that. and there was a scam that went around back in the 90s with the the cache Ram scam. I'm sure you can google that one where they sell you fake case RAM chips because these were quite expensive but they are readily available. You'll walk down to your local work computer store and buy these are cache RAM chips very common part from that standard 7 4 series art TTL stuff and the only special stuff which was available from far Nels at the time I believe these lattice is pls I Chips are a little bit expensive but the starter kit for it was only $99 as I'll show you what shortly and it was quite cheap and you know it was pretty advanced to do a project in a magazine using these LSI chips at the time.

so a very long time electronics Australia was really against microcontroller based projects and anything that used FPGAs or custom. You know LS is like this and things like that, but you know they. they agreed to publish this. they went oh yeah, you know it's good and novel enough.

and yeah, we're pretty happy that you can actually buy them and the starter kits. relatively cheap, so they decided to publish this one. no problems. Now, as far as the Yeah PC interface went here: I Loved the seven 4hc, two five nines.

very common because you only had the 8-bit data bus coming out of the PC parallel port plus a few control lines I think it was like you know, twelve lines all up or something you had available. Some were dedicated inputs and outputs and stuff like that so you'd expand them. It turns out that I needed 16 different control signals. That was the absolute minimum I needed to control this project.

So I whacked on some HC 2 v 9s they're they're addressable latch decoders so you put so they've got a 3 a 3 input address there. so I just comment those together and then a data line and then a latch line so you can actually latch a 1 or a 0 through to any one of the selectable outputs. and these are very handy chips. Even today, you know I would still go for a you know HC 2, 5 9 if I needed to do something like this.

They're just great chips and check it out! I Still have my original prototype I built here and this is the one that they I am sent to them I physically sent him and they photographed it and put it in the magazine and then not send it back to me. That was common in that they day they didn't trust you to take good photos. This was before digital camera folks. they they had to take this with old-fashioned film camera and they didn't trust you to you know, take they.

They had their own setup and everything and ways to photograph and put it in the magazine. So yeah, you'd send them your prototype that photographic tested of course and then send it back to you to make sure it did the business and very simple was just data and power. LEDs and these um standards our point: one-inch jump headers for the input. of course they were like external trigger input.

There was an external 5 volts on here external clock, external 5 volts here for external a pro. you could hook up and if we have a look inside, that's not a huge amount doing here. Yes is a rough-and-ready original prototype. We've got our mains transformer just the ribbon cable going off to the 25 way D connector.

but back for the parallel port and then we've got our main board. Yes! IH this board myself and there's single sided and we've got up there. We've got our three socketed lattice chips here. Of course they had to be socketed.

no in circuit programming for these puppies. I Had to put them into an external programmer which I a little custom jig which I made for these things because I did so quite a few of these. I sold a package with the pre-programmed art micros and the software and things like that and a lot of people built this on their own. but yet everything is socketed because well, this was an original prototype, so you know we've got some Marvin Monroe's est Networks there and Bob's your uncle.

There wasn't too much to this. it was a very simplistic design, but to get the speed I Wonder. Had to use seven for a CT series chips here. And as I mentioned before, signal integrity was a real issue on a single sided board like this.

You just couldn't get your loop area small enough that you could if you used a double sided board, so it's a little bit iffy in that regards when you try and push it in. 7. 4 AC they take real huge gulps of that current when they switch. So yeah, that was a bit of an issue, but it did work though.

it's you know, it was a hobby kid. It wasn't a professional kind of thing. it was just designed as a fun thing to design your own logic analyzer. and ultimately, as long as you're careful with the probing and things like that, it did work out fairly well.

up to 40 megahertz, right? So I thought I'd take a look at some of the stuff I've got and these are all the original files that I have here. Here's the actual user program itself, the ball hand Pascal seven I think it was source code to it, various source code, a test program, a readme document which came with the software and acted, and actual readme executable which I wrote myself which just allowed people to read the doc file without having to. yeah I have a reader program like open a text program or anything like that. It just worked.

It was only eight kilobytes. Absolutely tiny. I've got all the schematic files as a whole bunch in here looks like there's a whole bunch of revisions I looks like I released version 3.1 so in the end that's what I did there and look. original date code of 95 why there's 93 there I have no idea what that 93 is that might.

um I don't know. Strange Anyway, I've also got end that all the schematic stuff would be in pro till schematic for DOS and here's all the projects for the letters CPL D ie in circuit programming device and these are and the PCB file as well. that's our pro tool for dos. So here's the original brochure for the letter size piece starter kit which is what I bought at the time.

Here we go. Price down the bottom. there we go 99 bucks and I'm the thing that's what I paid. Is this an Australian brochure? It was pretty cheap at the time for a development kin.

This was incredibly cheap. You've got to remember, you know he didn't get free tools like you did these days. The this was absolutely incredible price I bought this and you know I probably saw the ad in where electronics Australian magazine or or somewhere else something like that because there was no internet back then and well there was no web as we know it anyway. So or you got all your information for your magazines.

Anyway, this starter kit. oh yeah, there it is at the top 99 bucks so that was really cheap. You got like a little programming cable with it which hooked up to the parallel port I probably think it was. Anyway, it worked with the ISP LSI 10, 16 and 20 32 devices and I thought I used some twenty thirty twos in here and also supported these ISP GDS generic digital switch chips as well.

and I actually wrote some software for these as well and actually sold it for a while. And you get the at the 1994 data book because well, you couldn't just download PDF so you had to actually hit the data book with all the data sheets and everything. So um, yeah it was. That's probably why I use these lattice devices because I bought this starter kit in a well you know what can I do with it I don't know.

Let's do. let's do a logic analyzer or something or I had the idea for the logic analyzer and then I thought AHA I can use those anyway. Whichever way it happened, it came with thumb starter kit software. Now no surprises for guessing you can't actually buy these.

Lattice is Pls I 1016 devices anymore you they are still listed on digi-key but they've got zero stock and well yet just don't bother. try to get them. you won't be able to because they were discontinued in September 2010. By the looks of it, all devices discontinued.

Well thank you very much. So my project is, you know, pretty much buggered right there. But anyway, these weren't bad devices at all. I didn't mind them, they were really fast.

um high density PL DS or you know Cpl DS whatever you want to call them and they were in system program compatible. So they had built in art well not flash but they had a EEPROM technology squared art CMOS technology so they were electrically erasable every program while using the in system serial cable which I I think from memory. just used the just used a couple lines on the PC parallel port to actually program these things. but on my board I didn't have an in circuit programming header because I don't think I had the pins available I think they were dual use pins or something like that.

but yeah, I'm very typical our global routing pool arrangement. for a CPL D device generic logic blocks around the outside. you could almost. yeah, it's not.

these aren't FPGA architecture, but they're you know, typical complex CP or D Well, all devices discontinued. thank you very much. As if I didn't know. Jeez! And here's how you calculate some of the timings.

look at these complex additional equations here for the very sub locks the I/o cell. the general is that the routing and note that's the general routing block, the output routing block, the general route pool or something in the IO cell on the other side. So yet did you do all this to calculate all your you know your maximum frequency, your timings I can't remember that the software actually did it all I can remember about the software is well I didn't do this in any modern language you know VHDL or Verilog any like high definition hardware language I did this like as a schematic block thing and then manually placed all of the I/o blocks in this thing. So yeah, it's like a visual drag-and-drop type thing.

so at the top level into the schematic, then it gave me all the blocks and then I manually just routed that. You know it all. basically routed this CPL d by hand I Remember reading somewhere that I you can't use more than 90% utilization of this device while high very clearly remember actually getting 100% utilization in this thing by hand routing it I think you could auto round it, but but it was. You know, a pretty piss-poor so I hand routed the thing.

It wasn't a huge design and if I could get the software working I'd show you but unfortunately I can't Now as it turns out, let us still make available this is P lever Project software. It's like desire to support all these legacy devices so you can actually still get it at work. runs in Windows 7 No problems at all which is all fine but it doesn't support these files. it actually needs a certain sy N file and mine don't have that may have mine have like LP our file zr jed as the standard are JEDEC output which you use to program the binary image you use to program the chip with the programmer software and the LIF I don't remember what the lift file is but the LPR I think is the project file slash a schematic you know information for the thing and I actually found an old note which I even noted at the time or a couple of years after that I released this design that are the new software.

Doesn't you know none of lettuces other software which supports these chips actually support the file from the starter kit so get locked into the starter kit and you have to. It's got its own file format and everything so you have to continue to use the starter kit software to actually get the thing going. One big trap for young players I Got really duped with that bloody $99 starter kit didn't I so that if you're using this in a professional application, you'd be and I screwed. If you have to support this, you know, years after the design was finished? Gladly? Yeah, well.

I didn't have to do that. but jeez, yeah, watch out for Bloody. Beware of starter kits using custom software. Lattice bastards.

Anyway, if you want to see a screenshot of my art dos software, yes it is Dawson on these Windows rubbish back in not 1995, 1996. So um, it was written as I said in that ball end Pascal 7 I believe it was. so we'll try and get that up and running in a minute. but that's the screenshot.

It did all sorts of weird and wonderful stuff. behind that. There were all sorts of menu options and things like that which I don't think a show on there I Completely forget. here's an old photo of the original prototype board hooked up to a test pattern generator I was using that to generate some test patterns and like you know, verify the software and do all that sort of jazz.

And because I did the PCB and the schematic in Auto Tracks look I can actually Det still download this from the out Ian's website even today they actually released a pro till as it was called back then Pro Tell Auto Tracks and that was the name of the company when the company's name was Pro till before they changed it for our team. for all you young whippersnappers out there and they make it available das Freeware 1.61 so I should be able to load in my PCB files but I don't think they and they released like an Easy Tracks version which is like a low-cost version at the time but they never actually released as far as I'm aware this schematic the you know the companion schematic tool for it which is ridiculous I don't know why they released Auto Tracks which is the PCB program and didn't release a schematic one. Oh well and here's his: SAS we're for those lettuce Gds chips GDS generic digital switch and this is exactly what they were. So I wrote this program because you had to like define these things in like a text file and then compile it and it was a real pain in the arse I wrote this a user interface is graphical user interface to allow you to like change.

The outputs could be like buffers inverters open. VCC So these are all the pins on the chip so you can get different types of chips and I think the software scaled to different devices and things like that. This is the ISP GDS 22 and I over. Finally released this into the public domain.

I Did sell this at one point and quite a few people bought it though a reasonably popular little are tips back in the day. Yeah, but you could read it. You can program them directly down through the parallel port I Can't remember exact details, but yeah, those were the days and well, who uses those anymore? I Don't know how long they lasted, but I think their lifetime was pretty short these lattice GDS devices. Now as it turns out, you can still run Ball in Pascal Seven actually released several versions to this as freeware or whatever it was, but I've got to run this in like a DOS box.

I could actually copy it over to the other machine, but I was able to get this running on my Windows 7 machine and we can. actually oh, it's a bit. it's a bit how you're doing there, so I'm not sure what's going on there, but anyway PC la we can actually the logic analyzer we can load in. Tada, there's my original source file and there we go I stopped it.

There was something wrong with the mouse there. Anyway, here we go. we're in like Flynn PC based logic Analyzer 1996 and all the color, color, syntax highlighting. That was the Ducks guts back in the day.

Look at that magic and here's all the original source for it. There were there were two programs. one was the main or to what source files, one was the main program and one was how do I go back Oh goodness and one was the main program and one was the interface program. I think so if we go up to I'll see compiled if we try to compile the thing line to long yeah oops, that was.

Yep, that was me I goof that something wrong there and compile line to long. Our goodness gracious couldn't have more than now 256 characters on a line I think back Then All right here we go Here We go. Let's try this compiled file not found graphed TPU Oh why not? Um, because it obviously found us CRT Library found the DOS library. It couldn't find the graph library so if we take graph out of the equation but it's not going to work I mean but let's just see what happens.

Could not find PCL a I-10 TPU maybe I hope it haven't copied that file in it's not in the correct directory. all that sort of stuff. So yeah, I can't immediately compile this. but if I wanted to, hey I could so it's it's still a win.

And you know, 20 years later I could probably still use ball and Pascal 7 compile it, get up and running. No reasons why I couldn't modify this program if I needed to end re compile it Now please excuse the Kerdi of my screen capture here. I'm going to use an old Windows XP notebook. Let's see if we can get Protel auto tracks up and running and load that.

PCB Yeah, let's do it Here We go. We here we go. We're going to load it up now. It contained Protel Back in the day had two programs.

One was Tracks edit which was the audio tracks program at Salford that you used to edit the PCB. Then I had tracks plot as well which you used to generate the Gerber's that didn't come standard in there. So let's go Tracks Edit: So whoa that we're rockin 640 by 480 16 color VGA Yeah baby! it was capable of higher resolution it can use like the Hercules graphics card. Woohoo! I think that was like 800 by 600 or was it 720 by something? I can't remember.

Anyway, it's version 1.6 1 ND stood for no dongle after they removed that hardware dongle that had to plug in your parallel port and this was the standard version of Protel Auto Tracks for like a decade or more. You know people were still using this well into the mid-2000s and might even still be at use. Some people still rock in this program so it's all our menu. It's all hotkey based, so even the hotkeys back then still work today in the modern version of our TM designer.

They don't work in the new version of that circuit maker unfortunately. But anyway, here we go: Auto Trax 1.61 so we can go file and then L for load and I've copied my original file in there. So let's load that up and Bingo! look at that. we're in like Flynn and here's my original PCB file.

No problems at all. I can go in there and edit that to my heart's content. Look how slow the redraw is. This is on a to a modern or modern in quote marks 2 gig Pentium machine.

So imagine what it was like back in the day. it was like these were horribly slow graphics routines in this thing. and by the way, Protel Auto Tracks was written in Borland Pascal same as what my programs written in for the PC based logic analyzer ball and Pasco incredibly popular and even today a lot of people don't know this. Altium is actually written in Delfy which is a Windows version of Pascal.

Basically, it came from the ball and Pascal aren't stable. it were used to be Borland Delfy which I used to start out writing my programs in Borland Delphi as well as up Microsoft Visual Basic as well. And but it's not all Delfy these days that this kind of kind of like all new stuff is like C++ or whatever. You know, more modern stuff but there's a whole mix of you know Delfy So Altium has this huge legacy baggage with all this.

Delfy code was really hard to find programmers. In fact, it wasn't practically impossible to find programmers. had experience with Dolphy so that hi you and then you'd have to learn Delfi too. You know they actually had to learn Pascal now because most people were used to see so.

but yeah it was incredibly slow. Even a faster machine did not help. The screen read rules on this and like and you can't even see the the holes in your pads. None of this modern What? What you see is what you get rubbish.

So yeah, but I can still load this program after all this time. No problems whatsoever I Don't know if it runs on like a Windows 7 machine, you can probably get it to run. but yeah I don't know, but it works. No problems whatsoever.

Beauty Check it out. My board contains at 717 holes which I had to drill all by hand. contains six strings, two thousand, four hundred and forty nine tracks. There's the info this size look at that you know.

free memory. oh you got 88 K free. Whoa! and EMS who remembers mucking around with EMS memory our that was the Ducks guts back in the day. but yeah this is a Protel Auto Tracks one point six one if you haven't seen it before now I can't remember if I can actually load a auto tracks one point six one file into a modern version of Altium Designer I don't think so I might have to like I know that profile for Windows are two point eight I think it was.

You could actually load these legacy files in so you might have to do two-step process if you wanted to get into a modern version of out. IAM Designer: I Don't actually have our team designer installed on my machine at the moment? I've only got Circuit Maker and I've tried the new version of Circuit Maker and it doesn't import these older files at all and the companion schematic gap program which they don't make available but I still have it on my old hard drive here as sketch. Edit: Let's load up sketch at it and Woohoo! it looks almost identical. 3.31 that was the standard for ever and load up this schematic file.

I will have to. Oh I didn't copy the file in Dole so if I want to get that file I actually got to go in here and change the path manually like this I Love it Project! So I can now go file load and I should be able to find my as my original digital storage scopes all sorts of projects. tons of projects. PC Logic Analyzer There we go.

3.1 C that's that would be the control chip that would be the trigger chip. Actually, that would be the block diagram. There we go. There's that block diagram today that I had published in the magazine.

There we go. Beautiful, still loads, no problems whatsoever. and AH that file load. You've got to go end and then backspace and then like that.

It's a little bit, but let's see if we can get up the original schematic PC Logic Analyzer the trigger. Here we go PCL A 3-0 C Let's have a look at that ice sheet - I did it on two separate sheets now I'm sorry three one There we go. let's load up sheet number one. Bingo we're in like Flynn There we go and all this might seem very clunky to you, but you know yeah I was so super quick at this I did professor I was working as a professional PCB designer using Pro Tool for Dos 1.61 you know before I switched over to the Windows version and you just got so quick with these with the hotkeys and everything else.

There we go. That's the schematic as per published in Electronics Australia Beauty. And once again, yeah - might load these schematic files into the modern software. Might have to do a multi-step process, but it's probably possible now if we have a look at our original files here my original program and try and load it.

I Think we'll have a problem here. This is the original program version 1.0 Yeah, rockin' it Wow Era 208 same error at with my readme program that I wrote as walk so I wrote that in ball and Pascal yep now this is a a famous bug in ball. End Score that in ball n Pascal seven that any modern machine and modern in quote marks I mean this is a Pentium M 760 processor at 2gig but any machine back in the day over I think it was about two hundred megahertz processor speed if your machine was too fast. There was a bug in the graphics routine in Ball and Pascal seven that actually spun up this runtime error.

so you had to either manually slow your machine down or yeah, there was a patch. er. they eventually made like a patch available. someone made a patch available for it, but then you had to recompile your software and generate the executable with that patch.

and I never did that because I think the patch came out like a couple of years later and I never went back to the project and recompile it. So all old Bull and Pascal programs try and run them on any machine over about two hundred megahertz. Um, coincidentally, throws up runtime error. two hundred what fail.

So there you go. This was a rather lengthy sorry about that look at my original PC logic analyzer program Got a bit carried away here. Very nostalgic about this sort of stuff. but I just wanted to see if you know I could actually load and these files back in and sort of the we've got some wins, you know the PCB and schematic.

Yeah, I can still load those in and edit those and probably import them into a modern version of our Rtm software if I had to. Yes, I can still run the original white source code in ball and Pascal seven. No problems whatsoever. But yeah, we failed on the Lattice isp chips.

I their disk physically discontinued might be able to get old stock things like that. I Couldn't download the Lattice ISP starter kits software anywhere. Maybe if I tried a bit harder, maybe if I looked on some old floppies somewhere, maybe an old hard drive or something like that might be able to get the original software. But yeah, I pretty much got screwed on that because I used a starter kit which wasn't compatible with Lattices main software.

Otherwise, I could have used their modern software to do that. Didn't write it in a high-level language because that's you know, it didn't need to. It was so small. That and that and the software was really good from what I Remember, you know the graphical user interface is schematic, which is what I was familiar with I didn't know high-level work hardware languages at the time I'm not even sure if it was an option for these lattice at CP or DS.

But anyway, so you know there's no VSD or no very log that you can import these days. but the project is so small it doesn't matter if you really needed to duplicate this stuff. You just take the schematics that you've got these days and you know, just redo it in a modern Fpga a modern CP or did it. Don't take your days work to, you know to reconstruct the things so it wouldn't bother getting old software and stuff like that and Shrine unless you are really desperate.

It's a very common issue in industry as I'm support throughout these sorts of projects and things like that. all these legacy projects, a lot of companies. they've got procedures in place to keep mirrors of old hard drives so that you've got the existing software and things like that. But yeah, well, sometimes you just dumb, you just can't do it.

You just you know, you just get stuck with these. You know if you don't put proper procedures in place to keep all of this old software and old development systems in the programming cables and you know all that sort of stuff. Any custom programmers things like that. So yeah, if you it can be a real issue so it can still happen today.

you can get called out. you design something now with a modern chip or a modern micro for example might get discontinued. Yeah, you might have the source code in C or something like that. Not too hard to port over, but you know there's still lots of traps if you're doing FPGAs These days should be using VHDL VHDL or Verilog.

They're not going to go anywhere. so you know in 10 20 years time you'll still be able to recompile stuff for those. I'm short. so there you go I Hope you enjoyed that rather long-winded look at one of my old projects from almost 20 years ago.

Wow! I've got even older ones in some other places, but it's amazing. I even found in my original hand-drawn images. But anyway, hope you enjoyed if you want to discuss it. jumping over the eevblog foreign links down below YouTube Comments blah blah blah Follow me on Twitter stuff like that.

hopefully if you've reach this far, hopefully I'm getting a new look eevblog website soon. So probably more details about that on the forum and the blog as things progress on that. but that's um, yeah, it's due for a revamp I Haven't revamped it? well I haven't touched it since I Originally launched the blog back in jeez, whenever. how long was that ago? Jesus WordPress Going to be discontinued or won't be old? Ah, no.

Legacy. Yeah, catch you next time you.