Hi, let's take a look at a very important aspect of electronics, which you're almost certainly going to have to learn if you want to do anything serious in electronics design and in particular, digital design, process, microcontrollers, all that sort of stuff. Its timing diagrams. and I've actually done a video back here I'll link it in at the down below and at the end if you haven't seen it. it's about one of my old PC based logic analyzer projects and I go through some of my old handwritten timing diagrams I did back in 1995 but looks of it and this is not just old school stuff.

Timing diagrams: You need to know and understand these and be able to draw them. Interpret them because if you don't know how to interpret them, then you're gonna have a real hard time understanding how chips work, implementing them, any troubleshooting issues you're getting with chips, your circuits not working, you can't quite understand why. Yeah, set up and hold times. At least.

do a whole bunch of different things and even basic stuff like you know, seven four series logic. You go into the data sheets down here and you'll get these timing diagrams. What are they? How do you interpret them? and that leads to things like the lure these hideously complicated looking things. But they're not.

They're real easy. Um, these waveform transition diagrams and stuff like that. Well, let's take a look at it. Very important topic.

Now, the first thing you have to understand is there is absolutely no standard in timing diagrams. I Don't believe there's any sort of official standard for them. There's no, it's this kind of some sort of de facto standards, but it's almost guaranteed that every time in diagram you're gonna see is going to be different, even quite substantially or subtly in many different ways from another one you've seen before. Let's just take a typical seven for series logic.

Tip: the symbol for hate. see Five, Nine, Five I Don't know who this man I Think this is a Motorola job II Take a look at this timing diagram. the exact same chip. Let's go.

two diodes Calm. Is this showing exactly the same thing? But it's actually ID They draw things differ. Here's another one. This is a Philips job.

You go to any manufacturer of exactly the same chip to show you the operation of the chip. Look. Some of them will have arrows on them, like on the transitions like this. others won't Some will have what's called Zed State Down here, others will won't have any thing at all.

Implies that it's a high impedance state. They'll put X's in there. Another one here will put a dashed lines in here and they're all saying and telling you exactly the same thing. But it depends on how peoples or companies personal preferences when they actually draw them.

So you're going to know how to interpret these things and then a lot of people think, oh well, this is only if you're designing with discrete seven, four series logic. What away I don't do that I Do everything in micro processors and everything Well, Okay, let's go in and have a look at a micro processor, Shall we? I Think they're just a pic Micro and I just picked a pic I'm here all week. Get it? Let's just have a look at this. You don't have to get too far into the datasheet before you start running into tonight for it.

Timing diagrams, Timing diagrams for these are the clock modes, the Run modes, program counter modes for switching to Sec run mode. all that sort of chairs. Look at all these timing diagrams in transition in between the different modes. Look at these.

We've got some oscillator startup action in happening here, and all sorts of a whole sorts of stuff. primary clock resets Because Remember, inside Micros are these. They show you the internal diagrams. They have actual physical hard logic in there and just like discrete gates, And there is all this is on timing diagram dependence.

So you'll find not only these internal diagrams, but the associated timing diagrams along with them. Here we go. That's a simple one, but you know it shows you where things are transitioning and why. Spi Tybee Mode: You're doing Spi I Squared C Stuff You've got to know about all these sort of timing modes.

You want to implement your own bit bang serial protocol. You need to know all this sort of stuff. Here we go: I Squared C Like this is like really important stuff to know and understand. Pair up startup sequences.

You don't understand why your chips not starting up properly. You've got to get into these sort of timing diagrams. It says timing diagrams up to the wazoo. Look at this.

wake up from sleep through interrupts you, designing your new low-power farting novelty eye gadget and it needs to wake up from sleep mode. And well, if you don't know what the timing diagrams are doing, you can come a gutter clock on Io time in. If you violate any of your setup and hold times or anything else, all this sort of jazz. What is like, we've got timing diagrams coming out the wazoo.

Now, timing diagrams are just a bunch of digital transitions represented over time, just like you'd see on a logic analyzer or an oscilloscope if you actually probed those pins. So you might have say a clock like this because usually a timing diagram is going to be referenced to usually to some sort of clock that's very common. Please excuse the crudity of my little mouse in accuracy here, but you get the idea. Everything's reference to a clock and this could be T zero over here and then time just goes off like that.

Okay, so that will be our clock. And it pays to draw things on a graph of engineering grid paper like this because it's important. You'll see in a lot of the diagrams down here. They actually show these lines down here and typically you won't see them, but you'll be able to visually see where things are lined up or they might be handy.

and they might draw in the lines for you so you know exactly Okay, this transition here happens exactly the same time as this. You know whatever clock transition thing up here does, so it's just a way to correlate all different signals together and show the differences in timing, set up, and hold times. I've mentioned these in previous videos very important. otherwise your logic just won't may not work.

Am I Going to a metastable state or whatever you might need to know on what edge of a clock or sort of latch signal or something like that is your data actually fed and latched through for example. Okay, so the first thing you need to know is that timing diagrams are basically representing in digital signals. Although we'll get not always, we'll get into that. So basically you've got a logic one up here at the top and logic 0 down the bottom or high and load depends on your terminology.

So if you've got a 5 volt Eto signal, it'll be 5 volts and 0 volts. If you got 3.3 volts, it'll be 3 point, 3, and 0 for example. And as I mentioned, often, things will be correlated against a clock or a latch signal or some other sort of a reference signal that you're dealing with. So usually in the case of a clock like this, it's very obvious when you're looking at the datasheet.

So if you see something up here, for example that's always transitioning, well, you know that's a clock. And the second thing is, you might see these little arrows. This signifies that something happens in the logic on this positive going edge. Sometimes it'll be a negative going edge and I'll show an arrow here for example, and then that will correlate.

If you actually go up here, you'll notice that our clock. If you follow the logic, you'll see that this is positive edge triggered because that's why we've got that on our timing diagram. You'll see it here. Clock Pulse Stcp It goes.

There's and that is just a buffer. It doesn't. It's not an inverter, it doesn't have it. If it had a not there, then you would know from looking at the logic diagram that all that's probably negative edge triggered.

Or if this was not CP or this had a not in front of it there and there, you would know that that's all that's negative edge triggered for example. But or it could be an inverter there and then it could have a matching knot over here and then you would know that that's positive edge trigger. But if that was an inverter, certainly down here you'd see that this has an arrow like that showing negative edge triggered. So those arrows are conveying vital information to you that are really something happens on that edge.

ie. it's going to clock in some data, so your data had better be there on those pins before this positive clock edge or negative clock edge arrives and so we can latch it in and do something with it. So here's your data. Let's say your data comes along here and changes at exactly the same time that that positive clock edge happens.

Well, that's called a zero set-up time. So that means that there's zero set-up time. Whereas if we actually go back, you can see that this time here where this data transitions here, changes here and before this edge. Here, this is called the set-up time.

and if we go down here, they'll show that on these more detailed timing diagrams. Here it is voltage, waveform setup, and hold times. Bingo! So you can see a data input here. Here's our timing input, which is our clock.

This is our transition here. We'll get into why it's sloped instead of straight up and later and TSU time setup. That's what the Su stands for. and you can see there's a certain time period there before it has to set up, so you know that's a parameter of the chip.

That can be quite important. If you don't meet that, you can come a gutter. The chip can go metastable, your data's not latched, your design just goes horrible, and you can have all sorts of weird and wonderful problems. So you go search for TSU in the datasheet.

Here it is setup time, data set to our HCP or air basically clock pulse. So a minimum you need a minimum of at four and a half volts because it changes the foliage. You need a minimum of 10 nanoseconds so your data has to be there, and a Viet your data has to transition over. It's a one, or it's a zero.

Doesn't matter what it is, but it's got to be valid before this clock signal comes along. And these are what your timing diagrams are conveying to you. and that's what they're kind of employing. Over here is that your data should be set up some significant time.

although they don't tell you some significant time period. I Eat showing half a clock cycle, but it could be much, much less than that. But it's showing you that that data needs to be said before the clock transitions. It's quite important now, as I showed, Sometimes you'll see a clock signal that has a straight or other data that has a straight edge like this, but other times you'll see it like this and it actually has a transition on it like that.

What does that signify? Once again, there's no strict definition of this, but what this transition implies, this ramp implies whether it's positive or negative like that. What that implies is that something is happening on there. so you might find that they might put the arrow on there like that, which obviously signifies that something's happening on that edge, but they may just show it as a slope like that to show you that something is happening between your well, your trigger points. We won't go into voltage high and voltage low threshold levels of digital logic, but it just implies that something could be happening on that edge.

Or sometimes you might have two different signals that are going like that and they're basically mirror opposites like that. And what that signifies is that this signal here corresponds to this one here. They're sort of like synchronized together so to speak. That's one interpretation of it.

It's not always like that, but you know you have to often interpret these diagrams in combination with the logic diagrams of the chip here. and next up, you might see signals like this that have both high and low and they might transition like that for example. or they might I go from high low like this, down to low. for example, what does this signify? Well, as you might be able to guess, it means that can be either positive or negative.

We just don't know whether or not it's a data input to a chip. It just signifies that it can be either positive or negative depends on your system you're feeding in, what your signal is or the output. We don't know because the timing diagram doesn't really know what you feed in, it's just telling you that it can be either a 1 or a 0. and you might see that in different ways on different diagrams.

This one here, for example. this one shows it like this: It's not a solid line, it shows a long - thing at the top and a short - at the bottom. that this the designer of this chip and or this company. What a sort of.

their standard is to use short dashes like this, four zeros and long dashes for one. but you might find that add other data sheets for exactly the same chip. why might have look dashes on the top like that and just a fixed line on the bottom. There is no standard for this sort of stuff.

You've got to interpret it. others won't have it at all. or if we go over to our pic chip over here. Sure enough, it uses the double lines like that, which is quite common for data buses and other sort of you know, collective group things for exact.

And by the way, this here. this shows these bits 1 & 0 inside the registers, but we won't get too much into that. And by the way, they can add little notes inside the timing diagrams. He delay here.

You know that that's important. There's a time delay between. it looks like I haven't need to know interpreted this I haven't thought about it. but it looks like something between the system clock and then when the internal oscillator starts up.

Okay, so right. Obviously this is the timing diagram for the run mode Starlett. So obviously they're telling you that the internal oscillator doesn't start up until a time delay period. After you switch, it looks like please correct me if I'm It switches.

but and when you switch those bits over in in the register, then you'll have a delay time like this which then you can go look up in the specs before that internal oscillator starts for example. And there's tons of examples like that. And here's where I said they don't always show digital. Logically, they can sort of like show all look.

the oscillators going to look like this is going to start up. if you actually have a lot and sample it on a scope, you'll see it actually start up like that. It's they're effectively representing an analog waveform in a digital timing diagram. They're just showing you that it's basically unstable during that period.

and TOS T I'm sure. OST start out the oscillator. T Oscillators start up. That's what it stands for.

obviously. Let's see, you can sort of interpret with experience. You can interpret these things. It's T is always time and OST would be awesome because we're talking about an oscillator owes obviously oscillator.

And it's obviously some sort of startup time because we're on a timing diagram. So that's how you can interpret stuff like that without having knowing or seen that on this chip before. Yeah, the next thing you need to know about is these grayed out bits here. What do these mean? Sometimes they show them as a crosshatch, Sometimes they'll show them as just a flat line like that.

Sometimes I'll put large X's through there. It varies, but obviously they're telling you that this is basically don't care. We don't care what that data is or we don't know what that data is or it's not valid. depend on whether it's an input or an output.

In this particular case, SDO is s data output. so it's going. We don't know what that data is, or it's the previous data which the timing diagram Doesn't care what the data is, but then it's telling you. Okay, now we've come along and this is actually a bit number seven and you can see that Obviously this is the clock thing up here.

even though they didn't put an arrow on there like that to signify it's a negative going clock. Obviously, based on that time in there, it's smack in the middle of this data bit. is something's happening on that negative edge there. And as I said, they could have signified that by maybe having a sloping edge like that.

but I'd once again, it varies totally between manufacturers, designers. whatever you want to do, as long as you're conveying the information that needs to be conveyed. But obviously something all this time in here is happening in the middle of the data bed, and that's what you want. But this does.

This is the output so that you'll notice that it actually changes the data on the positive going edge. So when it's shifting out data that happens on the positive going edge up here, and that's probably why they didn't put arrows on there cuz you'd have to put an arrow there plus an arrow there because things are happening on both the positive and negative edge. In this particular case, the data output is obviously changing on the positive edge there, because look, they've even drawn the dashed line down there. But the input here is actually happening on the positive edge up there.

And of course, this signifies that you can actually change whether or not it's positive or negative. a negative edge triggered with this particular register entry inside this microbe. So anyway, if you take your timing down there like that, you'll see that this is a set-up time like this, and this is a whole time like this for your data input. and it seems non-critical enough not to actually have any particular info in there.

But this may be a top level timing diagram where they don't delve into that. just like these ones down here, they don't delve into any air timing you've Actually, if you want to look at the timing, you've got to look at these specific switching waveforms here. But these are still timing diagrams even though this call them switching waveforms. Another thing you almost certainly come across is one of these things.

What is this? They sort of like break up the signal, break up the clock, and just put some typically - the lines through here. I Mean have a look at that if we go over to this microchip one for example. Bingo. Here it is here.

They've put little s's in there, but it can be dashes. It can be. You know it can be lines broken up. It can be many different variations, but it basically signifies that well, stuff is happening over a long period of time in here and we don't care.

and we don't want to show it because we've only got a limited amount of space on our data sheet where our timing diagram to actually show you all this stuff. And in this particular case, they'll show bit 0, bit 1 and then they'll finish we bit seven and eight. here. they won't show you all the other bits cuz obviously.

Well, what they're doing with that is actually they're They're really implying that the same stuff happens with bits two, three, four, five, and six that it does with bit zero. So if this is a negative going edge here and it switches the bits in, it's going to be exactly the same thing. For the other bits, they're not going to change it up so it's just like a something happens in their thing just to shorten up the timing diagram. Now, another thing they'll do to shorten and compress schematics.

They may not put these lines in here to show you that they may actually. let's just say you have a latch signal for example, and it's a pulse like that and there's a massive. There's actually a massive time period like that between latches, but they can't show you that on the page. They may put that you know something happens thing in there, or they may not.

They may simply just show it like this for example and just shorten it. There might be night, not be anything, and this is where the timing diagram doesn't necessarily represent the exact amount of time in the system. Obviously, if they have a clock up here and the latch data as well, then if they've got that clock, then that signifies if you draw your timing diagrams right and you should, then you're employing by showing that clock that everything is in real time. So unless you put that dash dash in there, then you really, you can't do this trick.

You can't do this trick down here, or you shouldn't do it. But just be aware that timing diagrams may not necessarily represent a fixed. So if your grid is like one microsecond per grid spacing for example, based on your clock frequency, then this may not necessarily represent that exact time. They may actually compress the timing diagram.

Just be aware of that. Whether you're drawing timing diagrams or you're reading them like this, try and look at. they'll give you this valuable information like this is word number one. This is word number two.

So if you're doing your I think I've done that over on my video example or didn't I Yeah, look I've put little notes in here like this is read back mode. This is right mode. This is waiting for trigger mode. By all means, when you're doing these timing diagrams, it's like doing coding.

It's like comment coding. Add in comments to your code. You can add as much information in here and it's like I've got hold. There's the word hold.

Therefore, hold hold hold W for write for example. So I know that I'm in. This is a read/write pin for example. So I'm in write mode when it's low like this for example and like so and here I've got like yes, setup and hold tight.

Well, there we go. I've put other notes like here like must stay load during write and things like that reading in writing mode and must allow trigger in this point. So I'm adding notes to myself. Basically, when I'm designing this, in this particular case, it's a logic analyzer that I'm actually designing and got published here.

So I'm I'm making these mental notes so that I'm yeah, there's a lot of signals going on here in this particular case. So those timing diagrams translated into this logic then then I can more readily draw and understand the logic diagrams, which then went into a CPL D /r Fpga device and then the next thing we're going to look at. Let's go back to our TTL chip. Here is once again a tri-state condition or a it's not a don't care condition.

In this particular case, this is the output enable. You can see that this data going xxxxX in here is showing you that that's obviously correlated with this signal here. So you've got A You know it may not have been right next to it like this. It could have been somewhere up in in the timing diagram, but you can see that it's obviously this is the result of this here.

and this is an output enable pin. So if you actually go up and have a look at the block diagram, you can see the output enable pin here. and this is actually a tri-state driver. so it opens circuits the output it.

So I won't go into tri-state drivers anyway. It's not our logic Hi, it's not a logic one. It's floating. It just disables that output.

So because this chip is designed to go onto a bus with other chips and therefore when you have multiple chips on a dress on a drop bus, you need to output it control the output enable so only one is on at any one time to give you valid data. So this goes into a tri-state mode and that's what they're signifying here by showing that they're showing its tri-state but you might confuse that for all, it's either one or high, right? So who did this datasheet? So this is a TI one? So the people that tell you how you drew this, this is probably not the best way to show a tri-state output or A or a floating output because to me that kind of means all it could be 1 or 0. It don't care. You have to actually go look at the block diagram and know and understand the chip from other parts of the datasheet to know what's going on here.

Well, no on semi on semi same know they're doing the same thing. but here we go. Diodes comment: they actually will tell you it's a Zen state or high impedance state. but once again they still show that they don't put the X's in there.

they show it as a grade blocked out space there. But huh? good on your Phillips. Now this next Spiria rubbish. They actually look.

Look at this. Not only do they tell you it's a Zed state, it's a high impedance state. They actually physically represent it by showing that it's in the middle and putting a dashed line there like it's in the center and that that can without even having the words Zed state there. But showing that line in the center of it's not logic high or a 1.

It's not logic zero or low. it's in the middle or therefore, it's in an analogue state. It's a high impedance state obviously. but they double down on that by telling you so.

Thumbs up to Philips That's how you do it. but sorry to on semi, there's a note down here. you've got to read. The note implies that the output is in a high impedance state, so they do actually tell you at least.

But you know you're going to read the fine print this: 7 4, AC 5, 9 5 here because they've got none of those little you know, something happens. You know, time stretching markers in there, and this is the serial register clock here. Then obviously they're showing you a complete cycle there of shifting data into the register. but they're not showing you shifting data out like this.

They're just sort of like truncated that off. And if you want to not actually know what they're showing you on this, it's just an example. It doesn't have to operate like this because we're talking about user inputted data here. Does it? You can feed in any sort of data, but they're just showing you an example here: Q0 For example, they're showing you the data Okay, the first data bit 1.

The data bit is high when this is clocked in. So when this data bit if you put a 1 on the input and then you clock it like this, on the next negative going edge like this, the data gets shifted because this is a shift register, gets shifted through to the Q0 output and then the data is gone lower again like this and a stays low for the whole cycle and then they can show that on the next clock edge. Okay, this data will be shifted in here at this particular point like this, but it's a zero so that zero there will get shifted through to this part here on this edge, so it's now zero and the formal one that we had here has been shifted over to here. So if you want to show this in a bit better detail, you could actually put a dot with an arrow there like that to showing that that one shifted over to there.

That would sort of explain it because if you didn't have that and you didn't have me to tell you what's going on here, you'd have to figure it out on your own. But that's the beauty of timing diagrams and why you need to understand. And because you have to interpret this sort of stuff and obviously it's going, it's the data is still low for the whole thing and you can show that what you know we get through 1, 2, 3, 4, 5, 6, 6 clock pulses or whatever. our one that we fit in over here has finally appeared over here.

and then next clock pulse. and finally P is on Q7 over here like this, so that one has just shifted all the way through like that. Winner! And there's more information they're conveying in the timing diagrams here like this: is this a synchronous Master UART type thing? This is the start bid here. They're telling you that let's stop it.

That's always going to be zero, but bit zero here. The bits after that, they can be a high or a low and the stop it has to be a one in this particular case. So all this sort of stuff in the timing diagram helps you further understand what's going on inside these registers and how they're affected. And this block diagram these block diagrams down here.

They tell you exactly what these things do and the timing. There you go, Something happens in here. We don't care about those bits. and then the next thing here is that they might have these arrows here.

They show that after this sequence here, whatever that is, then that corresponds to this bit, the interrupt flag happening down here. so they're just showing you that they correspond. Once again, this thing causes this to happen. So these might show a sequence for example, Like they could show that this causes this, which then causes this to happen for example.

and then you might draw in a little arrow like that to show that that particular transition causes well, that transition, That one causes that one, and that one causes that one. You might want to show a sequence of transitions, for example, or you might want to show that this point here and you put the little dots so that point there corresponds in time to that point. and you might want to show that both of those caused this thing to happen over here. So if you point those two points, cause this one action down here to happen.

and that's pretty much all the basic stuff on timing diagrams. As I said, there are different variations almost every time in diagram you see in every different datasheet, even from the same manufacturer can be different depending on who actually wrote that diagram. Unless they've got a very strict company policy on their time in diagrams, a lot of companies will copy other one, but you might see that a new company, a new ish company like our diodes Inc for example, might copy the data sheets of one of the other manufacturers, for example, so you know they might have copied Phillips or who've been around for generations. In these sorts of cases, timing diagrams are sort of like these, sort of like the de-facto quasi standards, just sort of like passed down from company, the company engineer to engineer.

and they just spread within companies and within groups and and other things like that, so you know you often see similarities, but sometimes there can be massive differences. but it's pretty obvious if you understand some of the basic concepts I've gone through here and I think I've gone through most of them. Let me know if I've left something out and maybe I can do a part two because there's always something new to add two timing diagrams because some of them can get you know, really quite complex and involved. So there you go.

Just don't freak out when you see timing diagrams like this, or these sorts of switching waveforms for example, they're They're really. this, looks hideously complex. a beginner looks like that, and just their brain explodes. How can I possibly understand that? Well, it's just a timing diagram.

Yeah, this is like a set-up time and they're just showing you the time difference between when this digital input switches and this one. here. In this particular case, they're actually showing you the 10 and 90% thresholds and they're putting it in the middle. Often they'll put a slope in there and they will show the line going smack through the middle of the slope even though that's not actually what happens inside digital logic because they have thresholds in upper threshold and lower threshold but I and which may or may not be 10 and 90% But we're But typically though, for timing diagrams set up in whole times, just for the sake of clarity, they will put it smack in the center at 50% like that.

and you can see that in this particular case. Here with this timeout sequence on pair up thing with your master clear, not Master clear line. for example, this internal reset line leave this is time correlated and they're obviously representing. They're not putting it smack in the middle of 50% they're obviously put it on the upper part of the slope.

So they're telling you that that is the upper logic threshold of that particular pin so that that point of time is correlated when it goes high like that instead of when it's through like that. Because Master Clear of course, when it's low is the whole chip as reset. and only when it passes through the logic high threshold. here does the chip come out of the internet visitor.

Flynn Turn there's a flag called internal reset only. Then does that go high. So you wouldn't show that at 50% because that wouldn't be a real representation of what's actually happening inside the chip. And then you can also show like analog of threshold.

You can have like a really slow ramp like this and show one volt. I Think that one volt is corresponding to this particular point here even though it's exaggerated. Once again, it doesn't have to line up exactly like it did. Here it's show.

it's representing that it's in the high part. It's the high logic threshold as opposed to a low thrust logic threshold which might be down here like this, which changes with the logic family. whether it's 4000, CMOS, 7, 4, HC, or HC T or you know, the TTL equivalent thresholds. Anyway, we won't go into that, but this one, obviously look, it's it's.

got one volt here, so that doesn't have to be like zero volts down here. It's 5 volts up here. They don't have to show it down there. they've just sort of like expanded.

They've taken a bit of Liberty there with that, but they're showing you at that one volt point like that, that that does something. There's this some sort of time in operation and we won't go into it, but you can represent analog type stuff on these digital timing diagrams. These things aren't hard, so don't be scared of timing diagrams. Start drawing timing diagrams cuz it really allows you to.

Not only often, you might do a timing diagram first, or you might do some logic. Then you might do a timing diagram after that to make sure everything's hunky-dory You haven't forgotten anything you may. A timing diagram is good to document what's happening inside something like this. You know it's one thing to.

Okay, well, there's all that logic I can maybe figure it out in my head, and mentally when you're looking at that, you're kind of doing a timing diagram in your head anyway. but it's easier to understand that often if you've got that time in diagram and you can see things correlate like oh, that output enables obviously causing this and and things like that Anyway, timing diagrams are great fun So I hope you learned something from that If you did, please give it a big thumbs up. And as always discussed down below or over on the Eevee blog forum, catch you next time.