Hi I Thought: I'd take a look at a forum question and hopefully try and find an answer for this particular, our forum contributor and I get emailed questions like this. A lot of times somebody has a problem. if their circuit it doesn't work, they want to figure out why and unfortunately I often don't have time to answer these questions directly just due to the volume of email I get and I've actually got a template form response that I don't like to send. but ultimately sometimes I have to saying look, I do I think it's better if you ask it on the forum, you'll get a better, wider response from people in the forum is the best place to answer these sort of things.

and occasionally I'll jump in and look at a forum question like this and answer it I did actually potentially answer it down the bottom I Thought it'd make an interesting question. So the foreign contributor is darkwing and darkwing are so I've built this circuit up. Here's a it's a 7, 4, HC 390 ripple counter and all they want to do is divide a pulse signal coming in. and there's the breadboard circuit and the Riga scope and what it's supposed to look like.

Of course, it's supposed to be just a simple 4-bit a binary counter. That's it. but it doesn't look like it's counting in binary. it looks there's something.

There's something going on here. so let's try and analyze this circuit and see what's going on, because there's potentially a lot involved in here. We'll go into the data sheets and have a look at this circuit configuration and try and figure this out. Let's go now.

I've reversed engineered the breadboard and here's a Dave CAD drawing of that. You can see that we've got the the two halves. So to speak of the HC 390 ripple counter. The ripple counter actually contains two sets of these.

So there's a divide by two and a divided by five. Like this and you can use them separately. Or we can do. a dark wing is done here and connect the Q output of the first divided by two into the divide by five.

And of course, that gives you were divided by ten counter. Oh sorry, it's a decade counter. I Said it was a four bit binary. It's actually a decade counter in this particular chip.

So and it's driven via an opto coupler over here and we can see that. sorry, it's the breadboards upside down so all the electrons are gonna fall out. Can't quite make up the resistive values. But I think that there's a 270 ohm in series.

It could be wrong. and I think it's a 2k 7 pull up to VCC and there's a bite. The first thing you might think I hides the chips. not bypass properly for example, but there's a bypass capacitor in there I think Darkwing says it's a hundred.

Here it is does not divide by two. they do. The second stage does not output a recognizable pattern. What could be wrong is somehow necessary to stabilize the IC Darkman found that if he put a point 1 micro farad across the VCC and ground, it did a little bit to improve this, but probably not much so.

can somebody give me a hint? So let's look at the circuit here and you can see that. Sure enough, let's just assume that the power supply is fine and hunky-dory and there's a bypass cap on there. You should actually put it directly to the pin over here, but it's reasonable. There's a little bit of extra inductance caused by that link they're going over, but on a breadboard.

And for this particular type of chip at these sort of speeds like at edge rates, it doesn't matter, right? So that's bypassed just fine. So we got our ground and power go into our chip. I've done a video where you can potentially make a a mistake and power your chip through your signal pins and I'll have to link that one at the end because that is quite fascinating. and that's something where there's some people come a gut So where you think your circuit is working and it does seem to work in most cases.

Then all the sudden you get some input pattern to your chip and it fails. It's because you don't have the power pin connected and it's a reverse powering through the protection, diodes and stuff like that. But let's just assume that all the connections are okay the first thing you want to suspect on a breadboard is a bad connection. For example, these resistors.

when you peel. If you get them on the bandolier thing right on the reel, they'll have those bandoliers on them. And if you actually just pull them out of that bandolier and go stick them in your breadboard, that's a bad idea because there's actually a bit of adhesive or glue in side on those tapes. So the ends of the resistor, the ends that you're going to plug into your breadboard might often contain.

If you just pull them out, they will contain a little bit of glue and that can be non conductive. So you got to plate it, plug it into your breadboard, and often that glues not really. it's not all that visible. So you might go to pull your resistor out of your bandolier, plug it in and it might make bay contact cuz it's got the glue on there.

So make sure you ever clean that or cut them off the bandolier if you're going to use them in your bread boards. Little trap for young players. that one come a guts of many times, Trust me. Anyway, let's assume that all the connections in the breadboard are good and there's something wrong with the circuit.

Either the wiring of this or there's something. we're off the chip, so there's something wrong somewhere else. Well, let's take a squiz. Okay, so the first thing we're going to is take a little the datasheet for our Texas Instruments 7, 4, HC 390 and it was a TI part.

You can see that down there. it's got a little TOA logo that's upside down, but pretty much any HC series data chip is going to be adequate here, so no problems whatsoever. So let's go down and take a look. Here is our counter: the divided by 2 and the divided by 5 and you'll notice that there's a little knot in there.

It's called a knot little circle. That means that this clock is going to go down on the negative edge like that. all sorry I've got my laser pen on, but it's going to be clocked on the negative edge and you can actually see that down here in the truth table. The Nega 20 clock goes negative like that.

It will actually do the count, but if it goes positive then you get no change. So it counts on the negative edge and that might actually matter for our circuit configuration as we'll take a look at. Now let's go down here. There's the internal circuit for those playing along at home if you want to see.

Anyway, what we've got is the master reset and the reset pin of both of these is actually connected down to ground. I've checked that so that's hunky-dory so there's nothing wrong off the reset and that is an active high because there's no not in there like that. So it's and you can look at the truth table and you can see that and Darkwing has connected Correct. We connected the Q0 output through to the clock input of the divided by five counter.

so that gives our divided by ten counter. So that should be hunky-dory right? Everything looks fine, right? So we know our chips by parts. We know the reset is all okay. and the other thing is is that the other pins aren't tired.

The other pins aren't the inputs on the other side of the chip here because I said it's got two of these are divided by ten counters in it. They aren't connected, and generally speaking, you shouldn't leave the inputs floating on CMOS devices like this. So I'd tie pins 1, 2, and 4 down the ground like that just so that the inputs are tied off. But in this particular case, I Greatly doubt that is the cause of our problems here.

Really, Because we're gonna have a low impedance drive into the other inputs. Should one half of the chip shouldn't affect the other half, It just might the inputs to these pins here. If you leave them floating, they might oscillate, which causes extra power dissipation inside the chip, but it shouldn't affect the other half of the chip. so that's not really a problem, right? So if the circuits correct, the power supply is correct.

We've got adequate chip bypassing. What's the problem? Well, literally. the first response I said was that 7/4 HC In fact, any logic device has a maximum input slew rate, so make sure your inputs are nice and fast edges. And if we go and have a look at the circuit up here and see what is driven from, well, the clock input here is this green wire pin 15 up here.

it's going over to here. it's going through I Believe that's a 270 ohm resistor and that's jumping over to what pin six of this HP 3700. So let's go and have a look at the HP 3700. Might have already guessed that this is a AC DDC logic interface.

It's an opto coupler and if we have a look at our internal circuit, the output is coming from pin 6. This is buggering off to our circuit. That's the clock pulse and you'll notice that that is an open collector transistor. Nothing.

It's not a totem pole output, which means so there's no active transistor in here that can actually drive this input very fast up to the positive rail. It's an open collector output, so you have to of course rely on a pull-up resistor to VCC Here in this case, it's I Think it's to K7 pull-up but even if it's like a very low value like 2.7 I 270 ohms or something like that. In this particular case, when you go positive, then it's not going to be a nice sharp edge like that. it's going to have a slew like that.

And that could that slew. There could be in the order of microseconds. It depends on the capacitance of the load that you're driving ie. the input of the chip that you're driving, capacitance of the breadboard capacitance of the PCB circuit races if you're using a PCB any other components that are connected onto that bus as well.

which is why not only 7/4 hey, C But any formal logic will have a maximum fan-out which is how many gates you can actually drive is due to the capacitance mostly this transistor. Here it should in theory give you a nice fast negative go impulse like that. There won't be much slew, but we can actually go down. First thing we'll do is go down and have a look at the data sheet.

shall we? Let's go and have a look to see if we actually have a value for our slew rate, shall we? Here it is output It, which is the rise in full time is the output slew rate, So you'll see that the output full time here here we go is not 0.5 microseconds, 500 nanoseconds. That's not particularly quick and so keeping that 500 microsecond figure in mind. and the output rise time is 45 microseconds. But as I said, that varies with the capacitance load and the pull-up resistor that you're actually using.

In this case, they give you a frame normal and that value is for a nominal 4.7 K + 30 / 4 30 Pico Farad's Airport which might be typical input capacitance of a gate or whatever. So there you go at best. We're probably going to get 500 nanoseconds full-time Which as we said due to this negative not input here, it's a negative going clock edge. So that's what we're concerned with.

So let's go down into the Sim Four series datasheet and have a look at our maximum horizon four times. Shall we? Just what you do when you're looking at data sheets? Just you know what units it's gonna be. It's gonna be second. So it's gonna be microseconds nanoseconds.

You know things like that, so you just want to scroll down you like you don't even have to read any of this stuff on the left-hand column over here. Just scroll down microseconds microseconds sir. Any AHA microseconds clock pulse width. Now this is the clock pulse width.

This is not what we want. This is actually the minimum width of the pulse. Before it'll it gets ready to count the next one cuz it's got to propagate through the chip because this is a ripple counter. So let's assume that the clock goes negative here.

It takes a certain amount of propagation delay to get through the gates inside there before the Q output changes and before it can be clocked again. And this is a ripple counter. Which means that this Q output assuming you've tied it T what? Assuming you've tied up to here like this, then it'll ripple through here. It's got to go through like that and then the output of this has to go into the clock of the next one.

And then it takes propagation delay to get through to here. And then it takes propagation delay to get through to here and through there. So that is why this is why it's called a ripple counter. The clock ripples through all the different gates as opposed to a synchronous counter.

But that's not our issue here, right? So it really got nothing to do with the clock pulse width. That's fine. I Don't think we're We've got an issue here and you'll see that's only a minimum value. because there is no maximum value for that.

It can be one. Hertz It can change. You can have one clock pulse every year if you want, and it makes no difference. It doesn't care.

All the chip cares about is the edge rate. All it cares is how fast is it. Stupid tool. All it cares is how far does it transition down.

How long does it take? So let's keep going to find some more nanoseconds. Aha reset removal time. Won't worry about that recent because it's just tied to ground we're not having. We don't have like a synchronous or a synchronous system reset or anything like that.

Reset pulse width is going to have a minimum value. We don't care about that because it's just permanently tied to ground. Let's go down to here. actually.

before we get to that, look, here's our input capacitance. You know how I said before? that can change your slew rate? Well, it's a maximum of ten picofarad seeit in puff, which isn't a huge amount and that's maximum could be like half that as a typical value. They don't give you any typical values in there, but you know there's a little bit half a puff. Paint the capacitance in there so that could matter.

but in this case, that's not really our problem. So this is interesting. All we've got down here is clock pulse widths. We don't care about reset removal times.

pulse width removal time. We don't care about clock pulse width. Again, reset, Remove. those are that's for the HCT types.

And then we've got switching parameters down here, which are your propagation delays. We're not concerned with propagation delays. that's only a system implementation when you are implementing a ripple count or how long it takes to ripple through each segment as I was talking about before. But this isn't anything to do with our maximum slew rate.

So output transition time. This is how long it takes to transition the output. It transitions in typically 15 nanoseconds for example. goes up with temperature and stuff like that, but yeah generally.

but it's a reasonably fast output edge on this thing. but all we care about is the input. so this is interesting. I Did not read this datasheet before I jumped into this I'm a suit I assumed it was in here.

There is no mention we're way down to the packaged stuff there is. Actually, we've come a gutter. There is no mention of the maximum slew rate of the clock input. I must be blind I should like therefore this stuff before I Press record.

Now it does tell you up here, these switching specifications are for a tea rise and that's a little are there stands for is the rise time and the four times are six nanoseconds. So all this stuff is tested and all these all these specs apply for when you apply a six nanosecond rise and fall pulse. that's very quick actually, so that's assuming that, but it doesn't actually tell you what the maximum transition is. and there's no like notes that are down here.

so it's got to be in here somewhere. It's not in any of the footnotes down here, so let's go up all the way. Bingo, input, rise and full time. Here it is here.

They specify for the different voltages five hundred nanoseconds maximum. So there you go. So it's actually going to be slightly under that four five volts, somewhere between like 454 70s. So right there.

If we go back and have a look at our opto coupler here, we could come a guts up. Like there's like we're already at 500 nanoseconds there. Half a microsecond for the full time and that's with the transistor pulling it down. That's not the horrible 45 nanosecond a rise time with a nominal 4.7 K resistor into that new capacitance load.

it might be faster than that. It's like in the order of tens of microseconds with the resistor 2k7 we're talking about here. Even the full times. No good.

So right there where we're incredibly marginal right there I Like I'd be concerned right at that, let alone for the rise. So that's a huge red flag. Not only are you operating outside of the and these are just typical values too that could change with temperature and parameter spread across production units and stuff like that already. we're really concerned that that's not going to meet our specification for our rise and fall times.

And of course, this is a no one problem. When you try and clock logic chips, or even just transition the inputs and things like that, you can cause them to go metastable. So yeah, oh, I think we got it. There's not really much practical difference between any of the logic HC or HC t or ere.

For anything else like there can be small differences and if you're designing right on the edge of the spec, the brand of the chip might make a difference as a few cases where I've personally had that. But generally speaking, when you're modestly in designing, it shouldn't matter at all. But if you remember, as we saw on the datasheet, it was already typically 500 nanoseconds. so we're already borderline even going negative.

with that fast transition. with the open collector output there, it's still borderline slow. And what happens is if your input is too slow, it can cause the chip to go into a metastable state metastability if it's not a separate video on that. If I haven't over covered it in in some video somewhere.

Anyway, metastable state. which means you don't know what it's doing. It could be getting multiple clock clock pulses. It could be getting none.

It could be skipping pulses, getting multiple ones. which is why we could be seeing this weird effect accounting effect that we get in here because this could be a metastable input caused by slew rate. So I'm almost 100% certain that the input slew rate caused by this optocoupler here is open collector optocoupler and this pull-up resistor here is what's causing the problem. The in this case, the negative going pulse is just is too slow for this thing and it just it can't count properly.

which is why it's giving you a weird counting configuration. So if a Darkwing actually our bypasses that and fees it from a nice clock source from your signal generator or some other TTL device, you'll fix it. Or if you really wanted to use this if you had to use the opto coupler obviously is feeding in some sort of AC signal, wants to convert that to digital and then clock the thing which is fine. but case you want a Schmitt trigger input or I'm sure I've done a video on Schmitt triggers if I have I'll link it in a Schmidt trigger won't get into a metastable state but most chips do not have Schmitt trigger inputs, Schmitt trigger clock or data inputs.

So in this particular case if you wonder uses seven for Hc3 ninety still then you would put they say a seven for HC one four which is a Schmitt trigger inverter in front of that so that it would clean up. that's low signal. So if you've got your up de coupler like this here okay and you've got your pull-up resistor like this instead of feeding that in December for Hco3 90 you feed it into a seven for Hc1 four and I can drill my Schmitt in there like that. that's the symbol for a Schmitt inverter and this input here can be as slow as a wet week.

You can take a second to ramp up and the Schmitt just goes. Me: I'll convert that into a nice beautiful in this case sorry nice beautiful negative because it's an inverter. nice sharp negative going output pulse which then you can feed in to the clock input of your chip and Bob's your uncle. You won't get any more metastability Anja 390 over here and that will fix the problem.

So yeah, these optocouplers notoriously bad for driving chips. Other things with open collector like an I squared C bus for example. This is why the I squared C bus which is an open collector bus. They the typical recommendation is 2.2 K pull-up resistors, but you might lower that to 1k if you want the bust.

Operate faster. If you've got more things on the bus which have more capacitance which causes a greater rise time in your signal when it transitions from negative to positive, those open click the buses and other clocks like optocouplers. A real pain in the butt. So I reckon that is the problem.

So I've actually been waffling on for like 20 minutes about the slew rate and how that's a problem and it will be. But that doesn't mean that's the only problem here. There could be multiple problems and by the way, looking at this, the issue is is that this, this is the input. This is that is that that? Yeah, now that's the o'clock one o'clock two and it's like inverting that.

So that could be caused by the metastability problem of the first / to counter that we're looking at. But once you get the output of that chip, you don't and you're feeding it into the second stage. here. you don't have that Mehta Stupid! Well, you still have a meta stability problem, but you don't actually have it.

This chip go metastable because the input should be transitioning nice. But the problem with that is is that the output of your / to counter because it's being clocked by a slow slow input that could be going metastable. The output could be oscillating like buggery doing all sorts of weird things and then that might not have the setup and hold times or the clock pulse with the requirements that we saw in the datasheet before - then clock the / V. So once again, I would have expected to see a more normal count on this side here.

So what I'd be doing if I was darkling? I'd also be zooming in on my Rygel scope on that yellow waveform there and checking out to see if there's any multiple clocks. In fact, you get a hint of that in there. Maybe not. But yes, zoom in when you're time-based zoom in and see if you're getting multiple transitions on there and if it's oscillating then you know it's like it's going metastable and going crazy like that.

But yeah, why we're not? get in a more normal countdown here. I don't know the reset pin. No, that's tied to ground so that's alright. So really, it can only be the inputs really causing that.

so there might be some goofy set up and hold output of your first / - stage may be oscillating. All it doing all sorts of weird stuff doesn't meet the requirements for the clock pulse or the second stage and that's goofing up the clocking of the second stage and stuff like that. because if you go back here and have a look at the internal diagram for this thing, it's you know it's relatively complicated, right? I mean if if your inputs, it is like you've got your clock pulse here. Okay, Pin 12 and it's got to drive all these gates here and if it's doing all sorts of oscillations, there's gonna be like set up and like set up times and stuff like that minimum cloth clock pulses as I said that we saw in there and if you're not meeting any of those, then this can really screw up this configuration in here.

and that's probably why we're seeing the weird count there rather than of course cuz the pin 12 that we're driving. There's no, there shouldn't be a slew rate problem there because it's being driven from the output of the / to counter which should be a nice sharp TTL h-scene you know CMOS slew rates. So yeah, that shouldn't be a problem. but yeah, it didn't do some funny business going on there which is screwing everything up.

but I think ultimately the problem is the input slew rate. If you fix that, everything else should fall into line. That's the plan anyway. So there you go I Hope I've answered Darkman's question I Hope he follows up with this and lets us know what's the problem is anyway.

so that's what I said down here is has maximum impulse low rate Yep, your clock pulse is coming from. not a couple of that. We'll be creating a slow positive no that's actually a negative edge sorry, positive edge yes, and potentially a slow negative edge as well that I'll take up was not that quick and try reducing your pull-up resistor for starters, etc. So there you go and so flubby dust down here mentioned year the floating inputs, but in this particular case, that's that's I'm pretty sure that's not the problem here.

It's not going to interfere with the other half of the chip, just might be oscillating and drawing more power consumption would be the only thing if that. So there you go. I hope you found that interesting. I Could go into details about logic, threshold levels, and metastability and all sorts of stuff, but all this sort of stuff requires its own video, a video on it.

So right? Really? So anyway. yeah, I hope that's the answer. Otherwise I'm gonna be really embarrassed if I miss something and it's just this breadboard wiring error or it's a as I said, a contact problem or or something like that. But yeah, notorious these optocouplers.

When you're driving, you don't want to drive signals directly from and collector like that. Um, so in this particular case, the first step would be to simply reduce the value of the resistor. go really low. go a couple hundred ohms and see.

if that fixes a problem. we'll look at that edge with your scope. It's got a Rygel scope there. More than good enough to look at the the slew rate either the positive and negative in this, the positive one's going to be the worst because it's got the pull-up resistor, but also the negative just to see how fast and sharp that pulse is.

That Rygel should be more than good enough of more than good enough to measure you know, the tens of nanoseconds or hay. In this case, hundreds of nanoseconds are possibly that we're going to get there. Any slow about any low bandwidth scope will be able to do that. So there you go.

I Hope you found that interesting. If you did, please give it a big thumbs up. And as always, discuss down below. catch you next time.