All right, let's take a look at the active igloo part here on a real FPGA This is a fairly small board. It's only 50 millimeters by 33 millimeters. Couple of point one-inch headers here. There's the JTAG interface down here in 0.1 inch jewel rope in header down.

They're pretty standard, but look at the size of this chip here and a couple of Oh Six Oh Three surface mount bypass caps. Let's take a look at the chip. It is absolutely tiny and if we have a look at the 3d view here, you can see that the FPGA itself is only three millimeters by three millimeters. and it really is not much bigger than than the footprints of the 2o 603 bypass capacitors here.

Absolutely crazy. It's A that's how small this device actually is. It's one of the the smallest FPGA on the market, but I mean we can go for smaller bypass caps there, of course. But really, you know it depends on the design you want to do.

This is a prototype, so I'm going to use Oh Six, Oh Three. Now the device, as we've mentioned, is a naught point four millimeter pimp it so it's no point four millimeters between each one of those pins. Now, this is a standard footprint for this for this particular BGA device. It's 36 pins.

You can see the tiny little pads in there. now. The first thing you're going to want to do when you put this down is to figure out how you're actually going to route out or what's called. Fan out the pins on this device and that is dependent upon whether you're using a double sided board or you're using a multi-layer board.

now. I'm going to put this on a double sided board and I've decided to actually completely fan out the device on the one layer and I can do this because it's only effectively are two layers deep on the outer pads to get down to the core down here. Now these are traces because well, FPGA II When you're fanning out these sort of things, there's a whole trade-off between how many layers PCB you're going to need when you found out these BGA type devices as opposed to a quad flat-pack or something like that which has all the pins around the outside and you can just route them out really easily. But because this is a BGA device, a ball grid array real pain in the ass and this is why.

it's a massive trade-off between your ability to route out the traces and the minimum trace with these traces I've got here there are in 0.1 millimeters or are just on fourth ow with and a lot of the cheap PCB manufacturers will not be able to do fourth hour traces if you want to go to, you know, or you'll have to pay more for that technology. So we're using a fourth ouch track and space as it's called in between here. Then really, we have to pay a manufacturer who's capable of manufacturing a what's called a four-four speck board. Fourth hour trace, fourth hour clearance and that doesn't include any wires at all on this design now.

I've got some buyers up here now. They might look like typical buyers, but take into account that My grid spacing here is 0.1 millimeters. Okay, each one of these grids and this Via here is a hole size. A drill hole size of not 0.1 millimeters.

It's ridiculously small and it's got a pad diameter of naught point Two millimeters. You know that's quite leading-edge stuff. You would be very hard-pressed to get anyone to do anything under this one here, which is a naught point, three millimeter hole size or a naught and a naught point formula meter pad. Now generally you wouldn't do that because you would want to include a bigger ratio between the Via hole size and the pad size.

so you might want to increase that To say, not 0.5 millimeters like that. So you don't get what's called a via breakout so the drill is not always aligned perfectly and it you don't want it to break out the pad. So you've got to take into account what your PCB manufacturer specifies in their tolerance there. But that's a nought point three millimeters which for general boards, you would not want to go below not point three millimeter drill size.

Trust me, you're in for a lot of expense and and special costing. Now this is a nought point four millimeter via size here. but I would typically use on a dense surface mount board. I'll tip.

my standard via will be naught point three millimeters like this one. Now if I try and drag that via under this chip and you can see because it's only a naught point. Four millimeter pin pitch I can't use an Ori millimeter wire under there. It's impossible.

Maybe I could get away with a naught point two millimeter via if I reduced the solder mask expansion which we've got here, but we'll talk about that in a second if I want to actually fan out this FPGA on different layers with vias I'm gonna have to use a naught point one millimeter drill size. Maybe I can get away with point two, but it's just crazy now. Solder mask as I'll show any. my solder in tutorials is very very important here.

Look, you can see that tiny sliver down there. The manufacturers not going to be able to manufacture that. Okay, there'll be no solder mask left. We've actually got a what's called a solder mask expansion here of not 0.05 millimeters or two mil or 2000 as expansion on a general board.

you might use, say, fourth hour, but because this is a very dense chip which by the way, this chip drives this entire design. Okay, you might have through-hole parts on the rest of your board. Big through-hole parts, massive pin pitches. You can use 23, 23, and FPGA in this pain-in-the-ass not point four millimeter pin pitch BGA Package Bingo! Instantly your to get your PCB manufactured.

You've got to go down to at least four four fouls. Or if you wanted to route out buyers on different layers, say this is a four layer board and you wanted to use that. Yeah! I Dropped through to the bottom layer to route out some of those pins. Well, you could have used a tiny little drill size like that now.

I could actually change my solder mask expansion if the manufacturer actually could actually do this. I could change it down to say one fell like that and you'll see it change. And in this case I might be able to get away with a naught point two millimeter maybe. but look at the solder mask expansion there.

it's bugger-all so you don't want your paste when you solder this in your solder paste is short out to your via and you would want what is called 1/10 Advice: You'd want to go in there and you'd want to force tinting onto those vias like that so that there is no solder mask expansion. So when you flip to the 3d view, you'll actually just see the difference there. So if I drag say to vires in here like this: I've got my not point one millimeter one here, my naught point two millimeter. This one has a tenth in on the top of the Via top and the bottom.

So if we go into 3d view here, you'll see. You'll notice that it's it. This is what one of the things 3d mode is really great for because it can actually show you the the real solder mask expansion on the board and what it's actually going to look like. In this case, it's a blue solder mask and you can see the individual pads there and the solder mask expansion.

Once again, remember we've only got a very tiny, very tight tolerance 1000 I asked expansion on those pads. The manufacturers got to choke when they hear that they're going to charge you a crapload of money if they're actually able to do that at all. But as you can see this one here, this site not 0.2 millimeter hole here. Doesn't matter if it's 0.1 0.2 millimeters or the size is, but because it's a forced tenting on top of those, then there is no chance of paste.

When you manufacture your board, you'll lay down some solder paste. no chance of it's shorting to the Via next tool. But look at this one here. It's tiny and that distance in there, he's only gonna be less than 0.1 millimeters.

It's tiny, so if you accidentally get some solder bridging across there, you're in deep trouble if you've applied too much solder paste. So really, when you're doing high-density BGA boards like this, make sure that you are tenth your voice and you may actually have to plug them too. You may have to get the manufacturer to what's called plug it and they actually put a little resin or something in inside to plug the hole first so that the solder mask truly does cover it. but when you're talking about like an or point one millimeter hole like this one which is insanely small, it's almost a micro via size really.

So again, I've just start tinted that one. There you go. it's a it's tinted. just make sure your tent or plug them.

otherwise you could end up with massive shorts under there and you won't be able to inspected of course and you won't know until you go and actually power up your prototype and it could actually even go bang if you accidentally short out ground and power poof release the magic smoke. Oops now I Got a little bit sidetracked. they're talking about all that sort of stuff, but we're talking about fanning out this. FPGA Ever using Vias or our tracers now because this is only two layers to pin layers deep? I'm actually able to get one trace out there I Can't get written to really because we're already down to fourth our or point one millimeter track width.

but sometimes in some FPGA is especially on the larger pin pitch ones. You can actually get two tracks out between one individual pin. Now if this FPGA was any bigger, we would not be able to route out the extra tracks here. We'd be forced to use some vias here to drop through to our other layers.

Bingo! If instantly meant that we have to get point one or point two millimeter drill hole boards. Much more expensive, pain in the ass. But anyway, I Figured out a way to route or fan out this device just based on a single layer here. So if you'll notice each quadrant of the FPGA like this is basically a rotational mirror image of the one up here.

Well, it's not quite, but it's sort of. This one matches that. This quadrant matches the diagonal quadrant over there and so on. And and really, it is quite a nice symmetrical rotational design.

I Like it brings a bit of a tear to the eye, really. So we've routed out these using forth our tracers. Okay, let's switch to Imperial mode because I'd like to use Imperial not metric mode from my traces. but for whole sizes and board sizes and things like that I use metric, go figure.

But yeah, that's just the way they A lot of the industry works. The PCB industry does mix up their their millimetres and their sales quite a lot, but you have to generally juggle both when you're doing a PCB design like this. Anyway, this means that we can sort of start fanning out these using larger traces. We might say go to a six hour trace or something like that when we take that because you don't want to use 1/4 au trace all over your board.

so you might just fan it out with those small fourth hour traces. Or you can even say fan it out with say, an eighth hour trace. Perhaps you might be able to get away with that, but just watch your clearances in there. If you don't have enough space.

there we go, we might. Yeah, that's probably gonna be enough space in there so we could fan this out with an eight with eight millimeter traces. No problems at all. So there you go.

That is basically vanning out a FPGA a point four millimeter pitch BGA device. Really, if you can avoid it using these type of packages and these devices do it because it can be really expensive and a real pain in the butt. And likewise, we're trying to get our bypass caps here close to our close to our power pins in here. so you drag it all the way over here and then you might have say a a wire in here like this.

Okay, dropping it down to a you know a power trace are on on a different layer. but look, this is a naught point three millimeter wire which is the which is the minimum size I would be comfortable with on on a basic board like this without paying a lot more. Some people would even say point four millimeters is too small. Okay, but once I get in there, you'll see that routing out these becomes a bit of a pain.

and then I've got to move my cap in here and it just it gets really quite ugly really quickly. especially if you've got a lot of bypass caps on a design like this. now. a lot of FPGA designs, especially some more advanced ones, will actually the bypass caps will be directly under the chip on the bottom layer, at the bottom side of the board and what's called a called a two sided load components on both sides of the board, so you can get a very low inductance path between your pad like if your wires here like this.

Okay, I might swap component down to the bottom layer down there. Okay, it's now flipped over to the bottom and I might set that on the bottom like that. Okay, so I can actually get if this was a huge device like a massive big you know, four or five hundred a thousand pin BGA device I put that bypass cap on the bottom there and bingo it's disappeared. You'll find that it's actually vanished onto the bottom side of the board right next to the via.

That allows me to get a low inductance path through to that bottom layer. But really, this was a very basic implementation. A very like the lowest end. FPGA you can get and there's actually a lot of factors I didn't cover.

Go check the data sheets. Don't be scared of these sorts of devices, just be aware that there's lots of traps for young players. A lot of things which drive your design decisions for FPGA not only on the schematic and the component level, but on the PCB level as well. So that was like one extreme example there of a ultra tiny three millimeter by three millimeter FPGA with not many I/o but it had a killer naught point four millimeter pin pitch and that really made the process technology for the PCB quite a difficult.

but hey, we could actually fan all of that out on just the one layer. so we could actually technically do a two layer board there if you didn't want to do ground planes or whatnot you could get away with. Now let's go to an a completely opposite example here. Opposite in two ways.

One, this is an pretty much extreme pin count Fpga. We've got 1131 pin BGA but the pin pitch. the ball pitch is instead of point four millimeters, it's one millimeter. so you can practically drive a truck through a one millimeter pin pitch.

So let's have a look at this. This is the board I Designed quiet a long time ago, this is based on a vertex V I'll give you a squiz. Isn't that jazzy? Anyway, it's a very well but Virtex 5 FPGA for those playing along at home and that's the partner By the FFG The 11:36 in there means it's eleven hundred and thirty six pins and this is like an 800 dollar. BGA It's not cheap at all.

It's got a SRAM it's got flash. It's got controlled impedance differential traces to rocket I/o it's got ten gigabit is SATA connection on it and things like that. So let's actually have a look. now.

this is actually a 10 layer PCB Why? Because not only do you need that for the controlled the high speed differential are traces. You need ground planes in there to our create your controlled well. You don't necessarily need those, but they helped a lot for the controlling penis traces, but mainly because the number of layers is dictated by how many pins you've got on your FPGA here. and with eleven hundred and thirty six pins, we basically needed ten layers to fan this thing out and do all the ground planes and all the different power planes and stuff that we wanted.

So let's actually take a look on the bottom here. Here we go, and you can see that we've got a smattering of bypass caps around here. This isn't a very good of an example of a nice symmetrical design bypass arrangement. I can show better examples of that, but you know I didn't really want need or want to show that here.

You can see that all the vias are are tinted, but as you'll see, they didn't really need to be in this particular case. So what have we? Yeah, and you can What? Whoa. Not sure what's going on there. Okay, they weren't I think something that was supposed to be our surface mount on the top.

I'm not know something's gone horribly wrong with the model. Don't look at that. don't look at the man behind the curtain. So let's actually go into 2d mode and take a squiz at this board.

Zoom All here we go. So now we'll be able to see the different layers. So I'll go into single layer mode basically and we can go through the different layers here so you can see this is the top layer so you can see how I've actually found out the you can see how here I've actually chosen the outer row of pins Here you are limited. It depends on the the internal structure of the chip, but I it for the high speed of rocket.

IO stuff. These are all the high speed differential pairs coming out. You can see that there are lengths matched and things like that not only matched lengths from it for each pair because I've snaked it like that that matches the length in there but also these little Wiggles in there wiggle-wiggle-wiggle year that matches the length of this one of this trace to its opposite pair there. and that's important not only to match between the different pairs but also in between the two pairs as well.

So anyway, that's just a little aside so that's on the top layer. And as you can see here, I've basically fanned out every single. Here are the BGA pads. Okay, and I basically fan those out to a very large via.

Look at this. this is let's go into metric mode: Not point three millimeters, not point six millimeter work, not point three millimeter hole with an or point six millimeter pad and I was able to do that because I because I can because this is a very wide one millimeters between these pins. These BGA balls Here, they're one millimeter each for those playing along at home. that pad size is not 0.5 millimeters and you might take that from the IPC standard or in this case, there's I Lynx recommended footprints or whatever it is you want to you choose to use for this thing.

Now you can see they've basically found out every single pad here to the differential except for some kind of tiny unused ones here. I guess I just like I Went through and did a tidy up pass at the end and just went well that pins unused I won't bother even Fanning and that way now, but you could just in case you needed to do that. but you can see that I didn't don't necessarily need to tent the vias in this particular case because I'm it's a one millimeter border ball our distance and I can fit a reasonable size via in there, not point three millimeters with no point six millimeter. Also, we could and this isn't a huge eleven hundred pin.

BGA We couldn't do that before on that little tiny percent three millimeter by three millimeter FPGA because the ball pitch was far too small, so that determined our manufacturing geometry. In this case, you know it made traces. This is just like really basic art, like five thousand space. I Think there's clearance on this is like five mil.

so it's actually this board even though it uses a much bigger, much more expensive Mac vastly higher pin count FPGA Its manufacturing tolerances are much wider because dictated by the pin pitch. So if we go back here to the 3d view and we disabled all the 3d packages, you can see that all my my top wires in there they're all tinted so all we've got is the BJ ball pad with a tiny bit of solder mask expansion there on the pad. but like I said, like there's large tolerance is there and then maybe I didn't have to actually tent that via in there, but as a matter of course you would actually tent. even though their tolerances are quite large here.

you would tent all the wires on the top there, but on the bottom I did, but you don't have to. In fact, it's handy not to I'm not sure why it's done in this particular case. I Can't remember, but it's handy to leave them untainted on the bottom because then you can solder little mud wires onto them, use them as test points and access things like that. So that's just like because you don't have to worry about solder paste on the bottom here except with, you know, nearby pads and stuff like that.

but it's not as big a deal as it is under the FPGA chip itself. Okay, for those who want to see all the different layers, so that's the top layer. you can see that I'm mostly fanning out these ones on the side now. I could with the pin pitch, air ball pitch I could have actually got went down to fourth our fourth hour and I could have routed out to traces between pads and I've got other boards where I've done that no problems.

might have even been three in one case in an extreme example somewhere. but basically our two is, you know, pushing it. but you can with a large one millimeter pin pitch or a say, a one point two seven millimeter pitch for example, on modern, some modern large parts do that to allow you to fan out on cheaper double and sided and four layer boards. But really, with this particular board, cost really wasn't You know, a huge issue.

Whether or not it was six layers or ten layers didn't really matter a huge amount if it was really for high-volume production. Yeah, I'd probably be optimizing trying to get trying to fan out two traces between pads. so then you know I might be able to get with a lower count lately account board. So anyway, let's have a look.

let's go down the layers and what I've done here is: I've just I removed all the ground planes so we can go through and we see the fan out. a bit nicer there. So there's the different signal layers. So I've got one, two, three, four five, six, seven different signal layers there and the other three are devoted to power and ground planes.

and you'll notice that one here. this is not actually ground. This is actually how I get in. This is a 2.5 volt our net.

This is the Fpga core so I actually are bringing that in from over here. Snake that in because see how like you know, not complicated. You know this is 1,000 I'm not sure if I've used all, but I've probably used like 8 or 900 pins or something like that and there's not that you know it's not that complicated. It gets more complicated when you're forced to do it on a cheaper number.

a cheaper board with a smaller number of layers. but that is like quite neat and tidy. And of course the pin swapping really made this essential. You can see all the you know all the pin swaps around here so it was just you know, very neat and tidy when you got the luxury as a PCB design.

a luxury of a 10 layers for a board like this, you just go. ha. No sweat, you know. But when they go to do it on six layers, we need to shave it.

You know, another couple of bucks off each board, then you you know it gets much more harder. much messier. It's much nicer like this because you can get grounds between all your different layers you get like your signal integrity is much better, your your ground impedances are much lower and everything's just much ground inductances and everything are much lower. and it's just much nicer like that.

And you can have you know separate differential pairs within separate ground planes and stuff like that. So this is not a particularly complicated board at all. but I just want to show you a large pink out VGA with a luxurious one millimeter pin pitch. Beautiful! The good thing about having the ground plane is that they're super low impedance and for high-speed FPGAs like this that need lots of bypassing.

it's all about the loop inductance. the loop area I've done separate videos on that I'm sure. and ground planes are pretty much essential on something like this. so even if you could fan it out on a double sided board, you might go pretty much be forced to go to a four layer board so that you could at least have a ground plane on there and then have the bypass caps and caps go in to that.

So let's go through. This is layer three. This one actually has a combination of some signal traces coming out. you can see the SATA ones the solder connections once again with the differential pair length and also pair match as well.

But I just thought I'd show more ground playing and then we've got signal and then you just flood filled with ground plane. That was basically what I was doing there. So I haven't aggressively tried to find out this out on the minimum number of layers it was. You know, pretty generous being able to use a ten layer board here.

you know I went. You'd at least target an eight layer board in this particular example. And as for the bypass caps on the bottom. as I said, this is not very symmetrical, but there's are like some large ones on, like the one volt core.

here. there's a 2.5 volt core voltage as well, and there's probably some IO yep, some IO over here at 3.3 volts. so just a smattering usually in most FPGA Pinouts: If you go and look at the pin outs for them, generally all of the power ground and power clumped around the middle. and that's why if you look at the bottom of any any production board with an FPGA you typically find if they're double-sided load which your big pink out high-speed ones are then you'll find all the bypass caps clumped around the middle of the chip instead of the outside.

They leave the outside for the I/o so that you can fan them out easier because if you got all your I/o in the middle and all your ground on the outside then fanning them out on your layers can be a real pain in the butt. So they've thought about that when they actually design and layout for silicon and have most of the ground and power pins in the middle. and if we go to the top we might be able to see that look. Most of them are ground pins see 1 volt ground ground.

There's a couple of ones in here that are nets but like a good lot of them look a whole you know whole big. In a quadrant of them are ground and power cores so that's great and or they just leave all the I/o to the outside. You know there's a few other like 3.3 volt by no no that's a net is it? anyway and most of the outside ones are going to be your I/o So there you go. that's a look at a eleven hundred and thirty six pin.

BGA You'll notice these things over here. these traces over here. Look at these, these little join us. This is how you do pin swapping in Altium Designer Maybe I should do a video on that cuz it's kind of cool because if you have a look at the schematic, let's have a look right? Here's all the I/o banks.

Alright, this is all the I/o banks for the FPGA and then it's just an absolute like there's a ton of these things and what you do is you go in there. Yeah, I won't do it now. but you go in there and you basically fan out the FPGA Now GM has an automated fan-out tool so it allows you to fan it out. they don't Sometimes they use that, sometimes they did and I did it manually.

can't remember if I did it. use the automatic one here or not. But then you round out the traces right around to the edge like this and then you basically rout in right so you don't Well you you put all your signal names on here, right? But then you fan them out to here and you leave a gap and then you bring in you. you route in all your other memory chips and everything else so you can note how you know nothing like the like.

This flash chip for example, doesn't go to the other side of the FPGA it just I just routed them into here like this right? and you know just nice routing on there. and then what you do is you run the FPGA pin swapping tool and it will go in there and reorganize and you can set banks to keep them within banks. That's important and I won't explain why and to and it goes through and swaps all those nets to match up. It's really like magic, so hands up if you want to see a separate video on that but it's very out Iam designer specific, it's not.

You know a generic thing for our PCB layout tools. actually I'll just show you that automated fan-out tool in our TM designer. this is our specifics. I've actually dragged the chip out of there and I've done the test one down here.

It does actually work. So what you do is you go in and set up all your rules. First, you set up your via size, your hole size, your pad size, you set up your space in your clearances, and all that sort of stuff designed on your manufacturing rules based on the manufacturer that you're going to target and we can just go in here too. fan out and individual component and once again, it gives us some options.

Fan out pads without any nets and it means if you have no Us Net sign to that particular pad, it'll fan it out anyway. as I said before about the unused pad if it's Unusuai Toin to fan them out because you might want to be able to attach the stuff later. Highly recommended. If you've got the space, they just leave that tick and then you can do stuff like our blind vias and stuff like that that are buried down into layers and we won't worry about any of that.

Let's just go okay and watch the magic. Come on Magic Computer Magic! Tada. There you go. We've found out and Eleven Hundred and Thirty Six pin BGA instantly.

just like that as done it in quadrants as you can see like that and it just knows that's the smartest way to do that particular component in our team. Designer specifically knows about. you know, fan-out BJ's and it's found out unused pins that don't have any nets and stuff like that so lots of unused. There's quite a few unused ones around here and it's found amount.

Anyway, there you go. Um, has it. Uh, is it tinted? Those not leave that horrid I Guess we don't know. Have any solder master look at that.

That's hilarious. Look: You can see all the different layers. You can see all the different layers. That is great.

That's what one of the cool things you can actually go inside the you can go inside the board by the way without Iam designer 3d view. Look at that. you can go inside. That's just great.

Love it, Love it. It's actually it's not just like a gimmick, it's actually very valuable. so you can see the larger space in here, between you see the core that we've actually set. It's got a larger pre peg prepreg between the boards and there between the layers.

Sorry, but that's yeah, that's very cool. Sorry, I don't have my space Navigator I'm here. That's just neat. I Always get a kick around playing with that.

It's great. Never gets old. There you go. that's a look at fanning out FPGAs I Just wanted to show you that extracted from an older video that I had because I thought it was kind of interesting.

So anyway, if you like that, please give it a big thumbs up because that always helps a lot. And if you'll want more PCB type stuff like this? yes, definitely give it a thumbs up. Leave it in the comments and oh no to do more if PCB type stuff I Hope you liked it. Catch you next time you.